Artisan IP tagging system tapped as VSIA standard

Artisan IP tagging system tapped as VSIA standard
By Michael Santarini, EE Times
August 21, 2000 (10:35 a.m. EST)
URL: http://www.eetimes.com/story/OEG20000821S0007

Physical library vendor Artisan Components Inc. (Sunnyvale, Calif.) has announced that its intellectual-property tagging methodology, Artiscan, has been made a standard by the Virtual Socket Interface Alliance (VSIA).

The Virtual Component Identification Physical Tagging Standard (VCID) provides an automated method of identifying and tracking use of IP through the semiconductor fabrication process and thus helps companies track royalties.

The IP tagging information is encoded into text records in a syntax described in the standard. Using publicly available software, manufacturers can process GDSII files and generate a report that identifies and describes all third-party IP tagged in a design.

Artisan said it was invited to present its tagging methodology to VSIA. Chip foundry United Microelectronics Corp. (UMC) had championed the approach in the early stages of adoption.

Based largely on input from other VSIA members, A rtisan provided the Artiscan definition as well as C-based tagging and reporting software to VSIA and extended the standard to allow any vendor to tag its GDSII files. The final version of the standard and example software was verified through a pilot program supported by Artisan, UMC, ARM and Mentor Graphics.

VSIA members can access and download the VCID standard (IPP 1 1.0) from www.vsi.org. Nonmember licenses are available for a fee.

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Atmel Corp. (San Jose, Calif.) has licensed the Teak DSP core from DSP Group Inc. (San Jose) for use in the design of high-performance DSP systems-on-chip for speech and audio processing, multimedia, wireless, high-speed modems and telecommunications.

The companies said the 16-bit, fixed-point Teak DSP core offers an upgrade path for users of DSP Group's Oak core.

Unlike the Oak core, Teak is a fully synthesizable soft core and as such can be implemented using any process technology.

The companies said the Teak core also provides several levels of modularity in RAM, ROM and I/O. The single- edge clocking system allows the use of full or partial scan testing methodologies.

Emulation, debugging and testing are supported via JTAG. Teak has a built-in interprocessor communication function that supports multi-DSP systems-on-chip for high performance, as well as operation with CPU cores. When implemented with Atmel's 0.18-micron CMOS design rules, the Teak core is said to occupy an area of 1.5 mm2 and to consume about 150 mW.

Teak joins Atmel's large portfolio of hard and soft IP. The company currently carries the ARM7TDMI, 8051 and AVR microcontrollers; the Oak core and the Lode DSP core processor; and such connectivity IP as Universal Serial Bus Hub and Function, 33-MHz and 66-MHz PCI; and IEEE 1394.

IP for baseband processing of 802.11, Bluetooth, embedded FPGA cores and voice-over-IP are also available.

Visit www.atmel.com or www.dspg.com.