32-Bit RISC-V Embedded Processor and Subsystem, Maps ARM M-0 to M-4. Optimal PPA,
Jim Lipman Joins Logic NVM Pioneer Sidense as Marketing Director
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation (Oct. 17, 2017)
Industry veteran’s semiconductor industry and IP experience will enhance spread of embedded non-volatile memory in many digital and analog applicationsOttawa, Canada - February 20, 2008 - Sidense, a leading developer of Logic Non-Volatile Memory (NVM) IP cores, today announced the appointment of Jim Lipman as its Director of Marketing. Dr. Lipman will report to CEO and President Xerxes Wania and be responsible for Sidense’s worldwide marketing activities as the company continues to expand its product offerings and customer base.
“I have worked with Jim for the past year and am happy he decided to join the Sidense team,” said Xerxes Wania. “Jim has tremendous industry experience and contacts and will be a key contributor as we extend our business and technology leadership position.”
Dr. Lipman was most recently Vice President of Client Services at Cain Communications. His prior experience, focusing on semiconductors, EDA tools and semiconductor IP, spans management positions in design, marketing and public relations at many well known companies, including TechOnLine, VLSI Technology, Hewlett-Packard and Texas Instruments. Dr. Lipman holds a Doctor of Engineering degree from Southern Methodist University and an MBA from Golden Gate University.
“I am very pleased to join a company such as Sidense with their industry leading non-volatile memory technology and products,” said Dr. Lipman. “I appreciate the opportunity to be part of the Sidense team as we continue to explore and identify new opportunities for our low cost and highly secure embedded memory IP for a broad range of applications.”
About Sidense
Sidense, listed on EE Times 60 Emerging Startups list for 2008, provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. Sidense's patented one-transistor 1T-Fuse™ architecture provides the industry’s smallest footprint and lowest power Logic Non-Volatile Memory (NVM) solution.
Sidense OTP memory is available at 180nm, 130nm, 90nm and 65nm and scalable to 45nm and below. The IP is available at UMC, TSMC, SMIC, Tower and Chartered. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, visit www.sidense.com.
|
Related News
- Faraday and Sidense Announce Joint Marketing Agreement; Faraday chooses Sidense as preferred Logic NVM supplier
- Virage Logic Appoints IP Strategist Jim Ensell Vice President of Marketing
- Virage Logic Appoints Industry Veteran as Director of Corporate Marketing
- Brian Philofsky Joins Flex Logix as Senior Director of Solutions Architecture
- Jayson Bethurem Joins Flex Logix as VP Marketing & Business Development
Breaking News
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
- Controversial former Arm China CEO founds RISC-V chip startup
- Fundamental Inventions Enable the Best PPA and Most Portable eFPGA/DSP/SDR/AI IP for Adaptable SoCs
- Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
E-mail This Article | Printer-Friendly Page |