Disruption in library offering for the 90 nm LP process with Dolphin Integration's new generation of High Density Standard Cells
Meylan, France – February 18, 2011. The SESAME HD architecture of Standard Cells is the unexpected alternative to conventional 7 or 8-track libraries, for its cost and power reduction capabilities at major foundries in 90 nm LP process.
SESAME HD meets the requirements of high volume applications based on area-sensitive designs from high-density consumer and portable devices.
Highlights
Low die cost
- Up to 7% smaller area compared to conventional libraries
- 6-track high cells
- Only Metal 1 used for cell design
Up to 50% less leaky
- Multiple VT support
- Compliant with low power flow
Easy implementation
- Delivered with scripts for an automated optimization at each step of the implementation flow (optional)
- Custom PVT support
Optimal Design for Yield
- Design methodology ensuring High-Yield circuits despite Mismatch
- Specification of OCV margins
- Support for temperature inversion corners
Have a quick look at the Presentation Sheet
To request an access to the evaluation kit:
Registered users can get the Front End Package including technical documentation.
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own EDA solutions enabling Integration Hardware Modeling (IHM) and Application Hardware Modeling (AHM) as well as early Power and Noise assessment, plus engineering assistance for Risk Control. For more information about Dolphin, visit: www.dolphin.fr/sesame
|
Dolphin Design Hot IP
Related News
- Ultra high density standard cell library SESAME uHD-BTF to enrich Dolphin Integration's panoply at TSMC 90 nm eF and uLL
- Dolphin Integration enable Dongbu HiTek's users to benefit from their ultra high density standard cell library
- TSMC's Extremely Low Leakage Devices on 180nm eLL process empowers Dolphin Integration's IP offering
- Dolphin Integration enables 1P3M/1P4M SoC designs at 180 nm with their ultra high density standard cell library
- Dolphin Integration announce availability of their 6-Track Standard Cell Library SESAME HD for the 65 nm LP process
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |