Digital Core Design has been awarded as a Microentrepreneur of the year 2013 by Citi
June 24, 2013 -- Digital Core Design, IP Core provider and System-on-Chip design house from Poland, has been awarded as a Microentrepreneur of the Year 2013 in the audit organized by the Kronenberg Foundation and Citi Bank. The jury, which includes businessmen, entrepreneurs and politicians, has chosen DCD’s application among more than 255 other runners-up. The award is a recognition for the most innovative companies, which include in their business strategy social responsibility and quality of products.
The ceremony, which has been held in New Connect hall of the Warsaw Stock Exchange on June the 20th, was a summary of audit, ran among distinguished Polish companies. After a strict audit made in the nominated companies, the jury gave the highest appreciation to the Digital Core Design nomination. – This award means a lot for our company – said Jacek Hanke, DCD’s CEO – firstly, because our company has been audited by independent specialists from Citi Bank and Kronenberg Foundation, secondly – because we had tough competition, like Airoptic or Robotics Inventions.
This year’s event has been the 9th edition of the Microentrepreneur of the Year award. The Kronenberg Foundation and Citi Bank informed that in 2013 there’s been the biggest number of applications – 256. – We’ve awarded the most innovative companies – said Grzegorz Wach from Kronenberg Foundation – but it was important for us to award their quality and social responsibility.
More information:
http://www.citibank.pl/poland/kronenberg/polish/6158.htm
|
Digital Core Design Hot IP
Related News
- DCD celebrates 25 years
- Digital Core Design Presents DAES XTS Cryptographic CPU for Unparalleled Security
- Weebit Nano's ReRAM IP Awarded "Embedded Solution Product of the Year" in the Electronic Industry Awards
- DFSPI IP Core from DCD supports all serial memories available on the market.
- CryptOne IP Core is ready for post-quantum reality
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |