Versatile multiport memory IPs allow SoC designers to increase memory performance by an order of magnitude more while meeting efficient area and power targets
SANTA CLARA, Calif. -- August 20, 2013 -- Memoir Systems Inc., today announced the release and immediate availability of Renaissance 10X, a new family of multiport memory IP cores that increases memory performance by a factor of ten. Renaissance 10X can generate memories with various read/write combinations for up to ten non-blocking active ports to achieve up to 10 billion memory operations per second (MOPS) in a 28nm process. The Renaissance product line, which also includes Renaissance 2X and 4X introduced last year, has gained traction with leading ASIC and ASSP suppliers and major OEMs. Renaissance memories are already used in high performance network switches and routers, datacenter, cloud infrastructure, software defined networking, and HD video SOCs. Renaissance 10X is currently used by customers who need more than 480Gbps bandwidth, or clock speeds beyond 500MHz.
Emerging data communication and cloud computing applications are pushing the performance envelope. In many cases, memory performance is the gating factor, said Rich Wawrzyniak, senior analyst at Semico Research. Furthermore, with embedded memories accounting for over half the die area of a typical SoC today, and predictions that this will increase to 70% by 2017, there is a compelling need to reduce the memory footprint and overall power dissipation.
Response from our customers has been remarkable, said Sundar Iyer, Memoir Systems co-founder and CEO. Customers tell us they are able to build high-performance, non-blocking, low latency SoC designs. The architectural flexibility of our memory platform is highly appreciated by ASIC architects who are able to realize system level features such as wire speed Netflow learning, non-blocking multicast, and very high speed measurements, while the low area and power footprint of Renaissance memories enables larger memory capacity.
Renaissance 2X, 4X, and 10X memories enable system-on-chip architects to configure memory performance to their application requirements. Memoirs IP eliminates the need to build custom multiport memories, reducing area and power requirements by up to 60% compared to physical multiport implementations alone and increasing multiport memory clocks speed up to 30%. Like the Renaissance 2X and 4X memories, Renaissance 10X memories are exhaustively formally verified, and no further silicon verification is required. The memories use a standard SRAM interface, and integrate into a normal ASIC, ASSP, or SoC design flow. For more information contact email@example.com
About Memoir Systems, Inc.
Memoir Systems, Inc. is a provider of breakthrough memory technology that is delivered as Semiconductor Intellectual Property (SIP). Memoirs revolutionary approach to memory design shortens the time required to develop new memories, and can increase the performance of existing memory macros by up to 10X more Memory Operations Per Second (MOPS). The companys Renaissance family of products provides drop-in replacements for existing embedded memories. These new memories offer increased performance or reduced area and power consumption without sacrificing performance. Memoirs technology is optimized for a particular process, node, and foundry and integrates seamlessly into any existing SoC design flow. Since the introduction of the company in October of 2011, Memoir Systems has received several industry accolades and awards including: winning a DesignVision award at DesignCon in February 2012; named to EE Times Silicon 60 list of emerging start-ups in April 2012 and named as A Red Herring Top 100 North America Tech Startup in May 2012. Memoir Systems is based in Santa Clara, California and has additional research and development facilities located in Hyderabad, India and Yerevan, Armenia. For more information, visit www.memoir-systems.com.