Nick Flaherty, Embedded Editor, EE Times Europe
10/3/2013 11:36 AM EDT
The recent port of a number of mixed signal interface IP blocks to 20nm by Synopsys Inc raises some fascinating questions on the microprocessor ecosystem. In days gone by, analog was well behind the curve. Now, USB, DDR, PCI Express, and MIPI PHY interfaces are available at what is pretty much the leading edge.
The Synopsys' EM family provides highly configurable cores where instructions can be added to accelerate specific applications -- ideal as the controller for memory or an interface that doesn't have to worry about running an operating system. This makes them well suited to the interfaces that have been ported to TSMC's 20SoC process.
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