Multi Protocol Endpoint IP Core for Safe and Secure Ethernet Network
Cadence Collaborates with Imagination Technologies to Significantly Improve Designer Productivity on PowerVR Graphics Cores Using Genus Synthesis Solution
Massively parallel architecture of Genus Synthesis Solution enables up to 5X turnaround time improvement
SAN JOSE, Calif., 03 Jun 2015 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it is collaborating with Imagination Technologies (IMG.L) to enhance RTL designer productivity and enable faster design convergence on Imagination graphics cores and other Imagination intellectual property (IP) using the Cadence® Genus™ Synthesis Solution. On the PowerVR GE7800 GPU, the Genus Synthesis Solution achieved a 5X improvement in turnaround time versus the previous Cadence synthesis solution with no impact on power, performance or area (PPA).
The Genus Synthesis Solution is able to synthesize a flat full graphics processor overnight, significantly improving design productivity by eliminating manual partitioning effort and avoiding poor timing optimization on cross-partition boundary paths. Synthesis runs are automatically distributed across multiple machines and CPUs, eliminating the need for manual design partitioning. This distributed processing includes intelligent resource management to ensure that no machine becomes a turnaround time bottleneck, thereby allowing turnaround times to scale linearly well beyond 10 million instances without any impact on PPA. For more information on Genus Synthesis Solution, please visit www.cadence.com/news/genus.
“At Imagination, we regard the ability to perform rapid synthesis as a key enabler for our customers to better explore the design space and achieve the best PPA within ever-shrinking tapeout schedules,” said Tony King-Smith, executive vice president of marketing at Imagination. “By working closely with Cadence, we can ensure that our mutual customers benefit fully from using the Genus Synthesis Solution on our IP core families. The Genus Synthesis Solution is showing encouraging improvements in turnaround time and PPA in comparative trials with other synthesis tools. Post-synthesis area and timing correlate well through place and route in the Cadence Innovus Implementation System.”
“Graphics cores push the limits of synthesis tools for capacity and PPA,” said Dr. Anirudh Devgan, senior vice president and general manager of the Digital and Signoff Group at Cadence. “This collaboration with Imagination Technologies ensures our mutual customers can benefit fully from the dramatic improvement in synthesis throughput offered by the Genus Synthesis Solution.”
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at www.cadence.com.
|
Imagination Technologies Group plc Hot IP
Related News
- Cadence Genus Synthesis Solution Enables Fuji Xerox to Improve Multi-Functional Printer SoCs Design Development
- Cadence Introduces Genus Synthesis Solution, Delivering Up to 10X Improvement in RTL Design Productivity
- Cadence Introduces EMX Designer, Delivering More Than 10X Increased Performance for On-Chip Passive Component Synthesis
- JVCKENWOOD Deploys Cadence Spectre FX Simulator and Comprehensive Design Flows to Improve Productivity
- Cadence Genus Synthesis Solution Enables Toshiba to Complete a Successful ASIC Tapeout with a 2X Logic Synthesis Runtime Improvement
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |