55nmHV MTP Non Volatile Memory for Standard CMOS Logic Process
NSCore Inc. Addresses the IoT Market Need for an NVM IP Solution in Advanced Process Technology Nodes
NSCore Inc. Addresses the IoT market need for an NVM IP Solution in advanced process nodes using Hi-k Metal Gate with their Multi-Time Programmable (MTP) Non-Volatile Memory (NVM) IP Solution
FUKUOKA, Japan -- November 8, 2018 -- The Embedded Flash Memory (NVM) technology has been a key component of the MCU and the IoT marketplace of several generations of technologies. Despite a significant amount of R+D effort, there is not a commercially available Embedded Flash Solution with Floating Gate or SONOS cells in the 28nm and lower process nodes which utilizing Hi-k Metal Gate (HKMG). Access to a low cost NVM IP solution in these advanced technology nodes, 28nm and below, is needed in the IoT market. It will result in a significant increase in the number of applications, and market adoption for IoT chip designs.
To address this need, NSCore is developing a new bit-cell structure, “P-Channel Schottky Cell”, on HKMG. It will require NO additional processing steps and it is targeted to achieve 10K cycles of endurance.
NSCore’s 30+ patents the its ability to build NVM IP solutions without any additional layers in a standard digital process, enables it to provide this unique solution in the 28nm technology node and beyond. The recently announced strategic relationship with Spectral Design & Test will also enable NSCore to offer a Compiler version of their NVM IP. This feature will enhance the chip designer abilities to make design and physical layout trade-offs as they architecture new chip designs.
The overall targeted performance for this new NVM are: 10usec of program time, 10K cycles of endurance and over 10 years of retention.
Since the NSCore NVM solution does not require any additional processing steps in the standard logic process, it will be a low cost NVM IP solution. Also due to the planar nature of these advanced but non-FinFET process nodes, many industry experts expect them to be the workhorse technology nodes for all future IoT development activity, and NSCore is looking to play a significant role in this market.
About NSCore:
Founded in 2004, NSCore is an IP provider specializing in the field of non-volatile memory technology. NSCore has developed a non-volatile memory core which can be implemented in standard CMOS platforms with excellent process portability, high yield and high reliability. NSCore provides a complete matrix of macros (bit counts), specific design parameters for each, foundry proven yield and reliability data, and finally multiple licensing options to fit the customer’s needs. The result is a non-volatile memory IP that is ready for integration into the end user’s product. Visit http://www.nscore.com for more information.
|
NSCore, Inc. Hot IP
Related News
- NSCore, Inc. introduces its OTP+ solution to address the IoT market need for an Ultra-Low-Power OTP NVM IP Solution in 40nm
- eMemory and UMC Expand Non-volatile Memory Cooperation to Advanced 28nm Process
- Intel and Synopsys Expand Partnership to Enable Leading IP on Intel Advanced Process Nodes
- Intrinsic ID Optimizes SRAM PUF Security Technology for Advanced Process Nodes with QuiddiKey 4.x
- USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP in 12nm, 16nm and 22nm process nodes with simple integration and flexible customization is ready for immediate licencing for your advanced SoC design
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |