Efinix Announces Availability of Reconfigurable Acceleration Platform
SANTA CLARA, Calif.-- October 01, 2020 -- Efinix®, an innovator in programmable product platforms and technology, today announced general availability of its Reconfigurable Acceleration Platform (RAP) initiative. Under the RAP initiative, Efinix will open its Quantum™ technology to a wider variety of engagement models.
“While Efinix has partnered to provide its Quantum technology in SIP or licensable core formats, most of our customer engagements to date have been with the popular Trion® and Trion Titanium lines of FPGAs,” said Mark Oliver, VP of marketing at Efinix. “The RAP initiative gives customers expanded access to known good die for SIP integration, core integration with customer-defined peripheral IP, and licensable cores for inclusion in customer-specific ASIC designs.”
The RAP initiative builds upon a wealth of experience gained in custom engagements with partners. It aims to deliver the Quantum technology’s power, performance, and area advantage to edge computing applications where space and thermal considerations can be particularly constraining. By working with Efinix in RAP engagements, partners can develop custom ASIC and SIP products that are tailored to the exact requirements of particular applications while retaining the acceleration and real-time hardware optimization that is the cornerstone of Efinix’s Quantum technology.
“As one of the early access partners to the RAP program, we licensed the core Quantum technology and were able to verify its potentials,” said ChanHo Yoon, Master of Memory Advanced Solution Development at Samsung Electronics. “Working closely with Efinix, the cores were successfully ported to our 10nm process node and integrated with our controller IP for verification."
The Efinix RAP initiative was born out of a realization that no one FPGA configuration can be perfect for every application. By separating the Quantum core technology from the peripheral interfaces and providing it to partners to use in their own custom designs, customers can now create cost-effective custom solutions with an application-specific mix of peripherals and system elements. The RAP initiative’s range of engagement options means that customers can select the time to market, investment, and risk profile that best fits their market and design capabilities.
“Our business is industrial control and automation. We needed a turnkey solution in a small footprint that would perform a custom function in a cost-effective design. There were no solutions on the market that met all those criteria,” said Pengfei Yan, VP of engineering at HCFA. “By taking known good die from Efinix and combining it with an application processor and flash memory in a single SIP package we were able to meet our small footprint and low-power requirements.”
All Quantum cores from the Trion and Trion Titanium families are included in the RAP initiative. For more information on the Efinix RAP initiative, visit https://www.efinixinc.com/rap. In addition, Efinix will present an overview of the RAP initiative and will host a virtual trade show booth for discussions and Q&A, at the Samsung Advanced Foundry Ecosystem (SAFE) Forum on October 28th.
About Efinix
Efinix®, an innovator in programmable products, drives the future of edge AI computing with its Trion® and Trion Titanium FPGA silicon platforms. At the Trion family’s core is Efinix’s disruptive Quantum™ FPGA technology which delivers power, performance and area advantage over traditional FPGA technologies. Trion FPGAs, offering 4K to 500K logic elements, have a small form-factor, low-power, and are priced for high-volume production. Our Efinity® Integrated Development Environment provides a complete FPGA design suite from RTL to bitstream. With their Power-Performance-Area advantage, Trion FPGAs address applications such as custom logic, compute acceleration, machine learning and deep learning.
For more information, visit http://www.efinixinc.com.
|
Related News
- Altior Inc. announces availability of AltraSTAR - Hadoop Storage Accelerator and Optimizer, based on its Altraflex HW acceleration platform and CeDeFS Filter Layer software
- TDK announces availability of automated ML Platform Integration for Arm® Keil® MDK
- Efinix Releases TinyML Platform for Highly Accelerated AI Workloads on Its Efficient FPGAs
- Efinix Low Power, Small Footprint FPGA Selected for SPRESENSE Development Platform
- Megh Computing Selected by 5G Open Innovation Lab to Help Drive Early Adoption and Innovation of 5G Technology
Breaking News
- Alphawave Semi announced today a refocussing of the Board of Directors after reaching the three-year milestone since the Company's IPO
- Synopsys and Samsung Electronics Collaborate to Achieve First Production Tapeout of Flagship Mobile CPU with Leading Performance on Samsung Foundry's GAA Process
- Worldwide Silicon Wafer Shipments Dip 5% in Q1 2024, SEMI Reports
- GOWIN's progress in global automotive market gathers momentum with award of ISO 26262 certification for its FPGA design environment
- PCI-SIG® Announces CopprLink™ Cable Specifications for PCIe® 5.0 and 6.0 Technology
Most Popular
- Silvaco Announces Launch of Initial Public Offering
- TSMC's A16 Process Moves Goalposts in Tech-Leadership Game
- Radiation-Tolerant PolarFire® SoC FPGAs Offer Low Power, Zero Configuration Upsets, RISC-V Architecture for Space Applications
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- QuickLogic Releases Aurora 2.6 with Expanded Operating System Support and Up to 15% Faster Performance
E-mail This Article | Printer-Friendly Page |