AccelerComm Announces 5G IP with O-RAN Acceleration Abstraction Layer (AAL) Interface
AccelerComm's latest product allows swift integration into any 5G Distributed Unit (DU) that supports the O-RAN AAL, enabling operators to select the most appropriate 5G physical layer accelerator cards to maximise flexibility and ease of deployment.
Southampton, UK – October 28, 2021 -- AccelerComm, the company supercharging 5G with physical layer IP which increases spectral efficiency and reduces latency, today announced that it has successfully demonstrated a fully compliant O-RAN AAL (Acceleration Abstraction Layer) Forward Error Correction (FEC) product for the Xilinx Telco Accelerator cards. This carrier-grade product enables AccelerComm’s high performance 5G NR LDPC encoding and decoding IP solutions to be rapidly and efficiently used as hardware accelerators in industry standard servers across a PCIe bus using the O-RAN AAL interface. AccelerComm joined the O-RAN ALLIANCE in December 2020 and has been an active participant in the technical development of the organisation’s physical layer standards.
“Central to the success of O-RAN 5G networks is operators being able to minimise their operational costs and maximise the flexibility of their RAN deployments,” Eric Dowek, Segment Marketing Director
Following the work in O-RAN Working Group 6 to finalise a standard which defines the hardware accelerator interface functions and protocols, known as the AAL interface, (see O-RAN ALLIANCE press release) AccelerComm has successfully demonstrated compliance to this standard. Using a Xilinx Telco card incorporating AccelerComm 5G physical layer IP and drivers, the company demonstrated Block Error Rate (BLER) and throughput tests of their high performance LDPC IP, as well as basic compliance with interface test vectors.
“This interface enables MNOs with AAL-compliant DUs to use accelerator cards from different vendors which, as well as easing their operational costs, means that operators can select the accelerator card that performs best in a particular use case scenario, thereby helping them to get the best return on investment out of their network.”
AccelerComm’s portfolio of advanced channel coding solutions contain unique cutting-edge technology to maximize spectral efficiency and reduce latency for truly high-performance Open RAN 5G communications systems. This enables the next generation of services requiring ultra-reliable, low latency communications, such as VR/AR, industrial IoT, autonomous vehicles and drone control.
- Read more about our recent split 7.2x product announcement
- Download our company presentation
- To organise a demo, or to test interoperability with a specific DU, speak to our experts directly
|
AccelerComm Limited Hot IP
Related News
- Lockheed Martin Prepares First 5G.MIL® Payload for Orbit
- Real Wireless Research Shows One Third Reduction for Private Network Infrastructure Cost Using AccelerComm 5G physical layer IP solution
- AccelerComm announces 5G O-RAN standards-compliant base station accelerator based on Silicom's N5010 platform
- AccelerComm Launches PUSCH Channel Simulator for 5G L1 Performance Evaluation
- AccelerComm Expands LDPC Accelerator IP Licenses for 5G Cloud RAN High-Capacity Solutions
Breaking News
- Arm revenues up 47%; shares fall
- Sondrel awarded new Video Processor ASIC design and supply contract for a leading provider of High-Performance Video systems
- X-Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ - a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor Core
- Softbank reported to be in talks to buy Graphcore
- VESA Elevates PC and Laptop HDR Display Performance with Updated DisplayHDR Specification
Most Popular
- Synopsys Enters Definitive Agreement to Sell its Software Integrity Business to Clearlake Capital and Francisco Partners
- Fabless semiconductor startup Mindgrove launches India's first indigenously designed commercial high-performance MCU chip
- sureCore announces successful tape-out of cryogenic IP demonstrator
- Siemens delivers end-to-end silicon quality assurance for next-generation IC designs with new Solido IP Validation Suite
- Announcing Availability of Silicon-Proven 12bit 1Msps SAR ADC IP Core for Whitebox Licensing with Royalty Free
E-mail This Article | Printer-Friendly Page |