Semiconductor and Embedded Systems Architecture Labs (SEAL) makes new technology available to everyone for learning and innovation

Santa Clara, CA — January 10, 2023 — Mirabilis Design Inc, the leading provider of System-level Intellectual Property and Simulation Solutions for electronics and embedded systems, announced the entry into Training-as-a-Service with the release of Semiconductor and Embedded Systems Architecture Labs (SEAL). SEAL is a learning platform for college students and professionals to augment theoretical and software skills with hands-on experience on the latest innovations. A university can sign-up to deploy SEAL in their course curriculum. This Lab combines trusted technology content on standards and applications, VisualSim Cloud Graphical Simulation Platform, brain storming questions and answer keys.

“There are a large number of standards, architecture variations and configurations in electronics.”, says Deepak Shankar Founder at Mirabilis Design Inc. “For a university or training center to procure prototypes, develop training material and create laboratory tutorials is extremely time-consuming, expensive and becomes obsolete almost instantly. Mirabilis Design has been working in the electronics space for twelve years, with 80 companies, 55 universities and 250 products.”

The initial release of SEAL has 67 standards and 85 applications. Major applications supported by SEAL include AI, SoC, ADAS, Radars, SDR, IoT, Data Center, Communication, Power, HPC, multi-core, cache coherency, memory, Signal/Image/Audio Processing and Cyber Physical Systems. Major standards supported are UCIe, PCIe6.0, Gigabit Ethernet, AMBA AXI, TSN, CAN-XL, AFDX, ARINC653, DDR5 and processors from ARM, RISC-V, Power and x86.

Students get practical experience on emerging technologies and immediately start designing with new standards and applications. The attendee can understand the impact of multi-dimensional changes to the topology, configuration settings and the performance/ power/ functional impact of the standards. Here are a few examples that students will be dealing with through SEAL.

• What is the throughput degradation of multi-die UCIe based SoC versus an AXI based SoC?
• How does autonomous driving timing deadlines change between multi-ECUs vs single HPC ECU?
• How much power is consumed in different orbits of a multi-role satellites?
• Which technology is more suitable for a flight avionics system- PCIe or Ethernet?

Preparing engineering students with technology skills for the industrial world

The trusted content has been verified by industry experts and simulated to ensure correctness. The brain-storming quizzes and the answer key provides all the resources required by the faculty to gauge student engagement and generate accurate grades.

Mirabilis Design will be exhibiting SEAL in India, USA and Europe in the first quarter of 2023.

• Embedded and VLSI Conference- Booth 16, January 10-12, 2023, Hyderabad, India
• AIAA SciTech Forum- Booth 216, January 23-27, 2023, National Harbor, USA
• Automotive Ethernet Congress, Booth 1, March 22-23, 2023, Munich, Germany

SEAL is available as a Training-as-a-Services and works on all the standard browsers. SEAL is now available for students enrolled in electronics, computers science and computer engineering departments. Professors or students may enroll at https://www.mirabilisdesign.com/seal/.

About Mirabilis Design Inc.

Mirabilis Design is a Silicon Valley software company, providing software and training solutions to identify and eliminate risk in the product specification, accurately predicting the human and time resources required to develop the product, and improve communication between diverse engineering teams. VisualSim Architect combines Intellectual Property, system-level modeling, simulation, environment analysis and application templates to significantly improve model construction, simulation, analysis and RTL verification. The environment enables designers to rapidly converge to a design which meets a diverse set of interdependent time and power requirements. It is optimally used very early in the design process in parallel with (and as an aid to) the development of the product’s written specification and long before an implementation (for example, RTL, software code, or schematic) of that product can even be started.