Menta Reasserts the Key Role of eFPGAs for the European Semiconductor Industry
Nuremberg (Germany) March 14-16 – Booth # 4-462
Sophia Antipolis, February 27 - Menta, a French deeptech company specializing in semiconductor design and winner of the Best IP award in 2022, will participate in Embedded World 2023, the industry's major event, alongside its partners, Andes, Codasip, Everspin, IC'ALPS and Secure-IC.
The European Parliament focuses on how to develop the semiconductor industry and reduce Europe's dependence. This requires to strengthen the technological and innovation capacity. Menta is the only European solution for embedded programmable logic and involved in several European projects. Menta is leading the MOSAICS-LP project, which aims to promote the development in Europe of so-called heterogeneous chips. This approach would enable Europe to significantly increase its chip production capacity and move closer to its objective of producing and designing 20% of the world's integrated circuits.
According to Vincent Markus, CEO of Menta "The bill to secure the EU's supply of semiconductors through production and innovation is essential to reduce Europe's dependence. Achieving these goals will require unfailing support from public and private bodies to foster the development of European technologies including eFPGAs that address the challenges of accelerating computing power and obsolescence."
On this occasion, you can also attend the Menta and Codasip conference:
March 16 from 11:30 am to 12:00 pm
as part of session 9.3 System-on-chip (Soc) Design - RISC-V Ecosystem
where Yoan Dupret, CTO, Menta SAS and Zdenek Prikryl, CTO, Codasip Ltd will explain how the combination of Codasip's RISC-V products and Menta's eFPGA products enable the adaptation of low-power ICs to continuous algorithm improvements.
About Menta
Menta is a privately held company based in Sophia-Antipolis (France). Menta is a proven pioneer of eFGPAs for ASIC and SoC designers seeking speed, accuracy, performance and efficiency. eFGPA’s adaptable architecture, based on design-adaptive standard cells-based and a state-of-the-art tool set, provides the highest degree of design customization, best-in-class testability, and fastest time-of-volume for SoC design at any foundry.
|
Related News
- Fraunhofer IIS/EAS Selects Achronix Embedded FPGAs (eFPGAs) to Build Heterogeneous Chiplet Demonstrator
- New Report Suggests India Can Expand Role in Global Semiconductor Value Chains with the Right Policies
- Semiconductor startup, Enosemi, launches with a committed commercial license to key silicon photonics design IP created by Luminous Computing
- QuickLogic and Xiphera Partner to Pioneer Post-Quantum Cryptography on eFPGAs
- Achronix Acquires Key IP and Expertise from FPGA Networking Solutions Leader Accolade Technology
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |