Orthogone Technologies Unveils FPGA-Based Lightning-Fast PCIe DMA Controller Solution

Cutting-edge IP Core technology designed to empower data centers with ultra-low latency performance

Montreal -- October 20, 2023 – Orthogone Technologies, a leader in FPGA and software engineering solutions, is proud to announce the release of its latest high-speed interconnect innovation: the Ultra-Low Latency (ULL) PCIe DMA Controller. This cutting-edge IP core enables lightning-fast bidirectional data transfer between the host CPU and FPGA, with a round-trip time of under 640ns.

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“Our new ULL PCIe DMA Controller is designed to provide a highly efficient and reliable solution for developing latency-critical applications,” explains Alexandre Raymond, CTO and co-founder of Orthogone Technologies. ” We are confident that our highly parameterizable IP core will benefit our customers with its performances, features, and capabilities.“

The ULL PCIe DMA Controller boasts impressive features, such as multiple customizable build time parameters, effortless integration with FPGA logic, and an extensive software development kit. It’s the perfect solution for data centers prioritizing ultra-low latency, enabling users to design applications with superior efficiency and reliability. This makes it suitable for various applications, such as electronic trading, networking, security, and high-performance computing (HPC).

Orthogone Technologies has become a leader in ultra-low latency applications and advanced network connectivity solutions by striving for excellence, having a passion for innovation, and strongly emphasizing research and development. The new product completes the Orthogone ultra-low latency product family. It includes the ULL Ethernet MAC and PCS IP Cores, the ULL TCP/IP, UDP/IP Offload Engine, and the ULL FPGA Framework.

About Orthogone Technologies

Orthogone, an AMD Premier Partner, offers highly specialized engineering solutions focused on the design of innovative products. The company also licenses intellectual property for FPGA, ASIC, or ASSP designs and a ready-to-implement Ultra-Low-Latency FPGA Framework for electronic trading in the financial, telecommunications, and data center markets.

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