Synopsys Acquires RISC-V Processor Simulation Tools Firm

By Nitin Dahad, EETimes (December 21, 2023)

Synopsys appears to be on a mission to build out its total RISC-V ecosystem offerings, having quietly acquired Imperas Software last week. Imperas, which EDA industry veteran Simon Davidmann founded in 2005, has become a key player in providing tools to develop software multi-processor core devices, with an accurate library of models for processors ranging from RISC-V to Arm, Imagination, MIPS, PowerPC, Arc and others.

While Imperas addresses simulation, debug and test for all the key architectures, its expertise in developing new methodologies to address the emerging expertise in RISC-V was a key proposition for Synopsys, especially with its recent entry into the RISC-V world with the ARC-V processor. Imperas also recently announced it had added the Tenstorrent Ascalon processor core to the Imperas RISC-V model library, and other collaborations for RISC-V applications with MIPS, Ventana Micro, Dolphin Design and more.

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