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Siemens advances intelligent custom IC verification platform with new, AI-powered Solido Design Environment (Monday Jul. 10, 2023)
Siemens Digital Industries Software today introduced Solido™ Design Environment software – an artificial intelligence (AI)-powered, cloud-ready integrated circuit (IC) design and verification solution that can help design teams meet and exceed increasingly aggressive power, performance, yield and reliability requirements while helping to dramatically speed time to market.
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Siemens unveils Calibre DesignEnhancer for Calibre correct-by-construction IC layout optimization (Monday Jul. 10, 2023)
Siemens Digital Industries Software today introduces Calibre® DesignEnhancer software, an innovative solution that enables integrated circuit (IC), place-and-route (P&R) and full-custom design teams to dramatically improve productivity, boost design quality and reduce time to market by automatically implementing ‘Calibre correct-by-construction’ design layout modifications much earlier in the IC design and verification process.
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Siemens expand collaboration with AWS to help IC and electronics design customers accelerate innovation (Monday Jul. 10, 2023)
Siemens Digital Industries Software announced today that it will expand its Strategic Collaboration Agreement (SCA) with Amazon Web Services (AWS) to focus on helping mutual integrated circuit (IC) and electronics design customers leverage AWS’s advanced cloud services to shorten design cycles, optimize engineering resources and boost verification coverage using current and forthcoming Siemens EDA products.
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SilTerra Leverages Silvaco's Library Characterization and Optimization Tools to Boost Efficiency in the Development of its Foundry Standard Cell IPs (Thursday Jul. 06, 2023)
Silvaco today announced that SilTerra has successfully deployed its library characterization, optimization and circuit simulation tools, Viola, Cello and SmartSpice, to automate and boost efficiency of its R&D teams for the development of its foundry standard cell IPs.
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IC Manage GDP-XL Enterprise IP Catalog enables NXP to Improve IP Asset Management and Reuse (Thursday Jul. 06, 2023)
IC Manage GDP-XL IP Catalog integrates with NXP's product life cycle management to deliver improved productivity, advanced IP searching, tracking, and reuse for global IC development
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Cadence AI-Based Virtuoso Studio Certified for Samsung Foundry PDKs for Mature and Advanced Nodes (Thursday Jun. 29, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the AI-based Cadence® Virtuoso® Studio design tools and solutions have been certified by Samsung Foundry. Joint customers can confidently leverage Virtuoso Studio and Samsung’s mature and advanced node process design kits (PDKs) down to SF2 to advance next-generation analog, custom, RF and mixed-signal design.
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Cadence Expands Collaboration with Samsung Foundry, Providing Differentiated Reference Flows Based on the Integrity 3D-IC Platform (Thursday Jun. 29, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced an expanded collaboration with Samsung Foundry to accelerate 3D-IC design development for next-generation applications like hyperscale computing, 5G, AI, IoT and mobile.
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Cadence Delivers Certified, Innovative Backside Implementation Flow to Support Samsung Foundry SF2 Technology (Thursday Jun. 29, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has delivered a complete, certified backside implementation flow to support Samsung Foundry’s SF2 process node. T
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Cadence Digital and Custom/Analog Design Flows Certified for Samsung Foundry's SF2 and SF3 Process Technologies (Thursday Jun. 29, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that its digital and custom/analog flows achieved certification for Samsung Foundry’s SF2 and SF3 process technologies.
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Samsung Foundry Certifies Cadence Virtuoso Studio Flow to Automate Analog IP Migration on Advanced Process Technologies (Thursday Jun. 29, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the availability of a certified node-to-node design migration flow based on the new generative AI-powered Cadence® Virtuoso® Studio.
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OKI IDS adopts Siemens Catapult High-Level Synthesis platform for design and verification services (Thursday Jun. 29, 2023)
Siemens Digital Industries Software announces today that OKI IDS Co., Ltd. has adopted Siemens Catapult™ software for High-Level Synthesis (HLS) and High-Level Verification (HLV) in their design and verification services.
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Ansys and Synopsys Accelerate RFIC Semiconductor Design with New Reference Flow for Samsung Technology (Thursday Jun. 29, 2023)
Recognizing the increasing challenges faced by designers of 5G/6G systems-on-chip (SoCs) and autonomous driving systems, Ansys and Synopsys, Inc. announced the availability of a new reference flow for radio-frequency integrated circuit (RFIC) design developed with Samsung Foundry for its 14LPU process technology.
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Siemens extends support for Samsung Foundry's latest process technologies (Wednesday Jun. 28, 2023)
Siemens Digital Industries Software announced today at the Samsung Advanced Foundry Ecosystem (SAFE) Forum North America 2023 a range of new certifications and collaborations with longtime partner Samsung Foundry, resulting in key achievements in enabling Siemens EDA technologies for the foundry’s latest process technologies.
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Synopsys and Samsung Foundry Deepen Collaboration to Accelerate Multi-Die System Design for Advanced Samsung Processes (Wednesday Jun. 28, 2023)
Synopsys and Samsung Foundry are deepening their collaboration to help chipmakers accelerate the design of 2.5D and 3D multi-die systems on Samsung's most advanced process technologies.
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Synopsys and Samsung Foundry Boost Power, Performance and Area for Modern SoCs on Samsung's SF2 Process (Wednesday Jun. 28, 2023)
Responding to significant market growth in high-performance computing, AI, mobile and automotive applications, Synopsys, Inc. (Nasdaq: SNPS) today announces a collaboration with Samsung to develop optimized digital and custom design flows on Samsung Foundry's SF2 process.
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Blue Pearl Software and NanoXplore SAS team to Accelerate Development and Verification of Radiation Hardened FPGA Designs (Tuesday Jun. 27, 2023)
Blue Pearl Software Inc., today announced that it has partnered with NanoXplore SAS to provide built-in device library support in its Visual Verification Suite.
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DB GlobalChip Deploys Cadence's Spectre FX and AMS Designer, Accelerating IP Verification by 2X (Monday Jun. 26, 2023)
Cadence Design System today announced that DB GlobalChip has deployed the Cadence® Spectre® FX Simulator, integrated with Spectre AMS Designer, to verify its crucial analog and mixed-signal IP, achieving a 2X improvement in performance with the required accuracy compared to their incumbent flow.
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S2C Accelerates Development Timeline of Bluetooth LE Audio SoC (Wednesday Jun. 07, 2023)
S2C has been shipping FPGA prototyping platforms for SoC verification for almost two decades, and many of its customers are developing SoCs and silicon IP for Bluetooth applications.
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Dolphin Design Selects Imperas for Processor Functional Design Verification (Monday Jun. 05, 2023)
Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced that ImperasDV has been adopted by Dolphin Design for RISC-V processor verification for the Panther DSP/AI Accelerator IP from Dolphin Design.
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Axiomise Launches Next-Generation formalISA App for RISC-V Processors (Friday Jun. 02, 2023)
Axiomise, the leading provider of cutting-edge formal verification solutions that include training, consulting, services and custom apps, today launched its next-generation formalISA® app with open-source, formally verified RISC-V processors such as cv32e40p and WARP-V.
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MIPS Leverages Siemens' Veloce proFPGA platform to Implement and Make Available Capabilities of its New High-Performance eVocore P8700 RISC-V Multiprocessor (Tuesday May. 30, 2023)
MIPS, a leading developer of highly scalable RISC processor IP, has collaborated with Siemens Digital Industries Software, a global electronic design automation leader, to speed time-to-market and accelerate software development for customers of the new MIPS eVocore P8700 RISC-V multiprocessor.
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CryoCMOS Consortium develops 4K & 77K transistor models to enable CryoIP development (Thursday May. 11, 2023)
The Innovate UK-funded CryoCMOS Consortium, led by sureCore Ltd, reports that it has successfully created new, PDK-quality, transistor models characterised for both 4K & 77K operation. SureCore is using these to develop key foundation IP to enable the design of cryo-control ASICs for use in the quantum computing space.
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FuriosaAI Enhances Next-Generation AI Chips with proteanTecs' Deep Data Analytics (Tuesday May. 09, 2023)
South Korean AI semiconductor startup leverages system health and performance monitoring to gain unparalleled visibility inside each device
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Siemens announces certifications for TSMC's latest processes, celebrates recent achievements for Siemens and TSMC collaboration (Thursday Apr. 27, 2023)
Siemens Digital Industries Software announced today at the TSMC 2023 North America Technology Symposium a range of new certifications and collaborations with longtime partner TSMC, resulting in key achievements toward enabling Siemens EDA technologies for the foundry’s latest process technologies.
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Cadence Digital and Custom/Analog Design Flows Certified for TSMC's Latest N3E and N2 Process Technologies (Thursday Apr. 27, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced its digital and custom/analog flows have been certified to support TSMC’s new Design Rule Manual (DRM) for the foundry’s advanced N3E and N2 nodes.
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Cadence and TSMC Collaborate on N16 79GHz mmWave Design Reference Flow to Accelerate Radar, 5G and Wireless Innovation (Thursday Apr. 27, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has collaborated with TSMC to optimize the Cadence® Virtuoso® platform for the 79GHz mmWave design reference flow on TSMC’s N16 process.
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Cadence Custom Design Migration Flow Accelerates Adoption of TSMC N3E and N2 Process Technologies (Thursday Apr. 27, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the availability of a node-to-node design migration flow based on the Cadence® Virtuoso® Design Platform compatible with all TSMC advanced nodes, including the latest N3E and N2 process technologies.
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Cadence Delivers New Design Flows Based on the Integrity 3D-IC Platform in Support of TSMC 3Dblox™ Standard (Thursday Apr. 27, 2023)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced new design flows based on the Cadence® Integrity™ 3D-IC platform to support the TSMC 3Dblox™ standard for 3D front-end design partitioning in complex systems.
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Synopsys, Ansys and Keysight Collaborate with TSMC to Boost Performance of Autonomous Systems with New mmWave Reference Flow (Wednesday Apr. 26, 2023)
To accelerate development of advanced radio frequency (RF) and millimeter wave (mmWave) designs with high reliability, Synopsys, Inc. (Nasdaq: SNPS), Ansys (Nasdaq: ANSS) and Keysight Technologies, Inc. (NYSE: KEYS) today announced the availability of the new 79GHz millimeter wave (mmWave) radio frequency (RF) design reference flow for the TSMC 16nm FinFET Compact Technology (16FFC).
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Synopsys and TSMC Collaborate to Jumpstart Designs on TSMC's N2 Process with Optimized EDA Flows (Tuesday Apr. 25, 2023)
Adopted by Leading Companies, the Synopsys Digital and Custom Design Flows Boost Performance and Minimize Power Consumption for Advanced SoCs on N3E and N2