The Performance ESP/AH (IPsec) Processor features a new enhanced architecture that can be scaled to achieve up to tens of Gbps of ESP/AH packet processing required for the IPsec Layer 3 security protocol.
The level of protocol processing and the addition of Security Association (SA) management by the protocol engine directly in system memory minimize the overhead on the host processor, thus allowing today’s high bandwidth requirements to be easily achieved in a wide range of networking applications. The highly configurable LLP-130 offers many attractive features and is targeted at a variety of networking applications including residential, enterprise and SMB gateways, VPN appliances, data centers, PONs and network edge routers.
Please note that the LLP-130 requires memory instances for data and contexts which is not include in the gate count. Please contact Elliptic for more information on the memory requirements.
- Pipelined offload engine with separate inbound and outbound engines
- Transport and tunnel processing
- Extended Sequence Number support
- AES-CBC mode 128, 192 and 256-bit keys
- DES-CBC mode cipher 56 and 168-bit keys
- HMAC-MD5 and HMAC-SHA-1, HMAC-SHA-256 mode hash
- Optional support for GCM-AES and SHA-384/512
- Support for AMBA and other SoC buses
- Pipelined offload engine
- Separate inbound and outbound engines
- Very configurable – pipelines and interfaces
- Supports throughput up to 20 Gbps
- AH & ESP processing
- HDL Source Licenses:
- Sample synthesis script
- Netlist Licenses:
- Post synthesis netlist
- Sample simulation script