Ceva IP cores address enterprise storage
EE Times: SILICON ENGINEERING: Ceva IP cores address enterprise storage | |
Richard Goering (10/10/2005 9:00 AM EDT) URL: http://www.eetimes.com/showArticle.jhtml?articleID=171203789 | |
Santa Cruz, Calif. - Silicon intellectual-property provider Ceva Inc. sees serial attached SCSI (SAS) as a rapidly emerging interface protocol in the enterprise storage market-and the company this week claims to have the first foundry-independent IP solution that will allow designers to implement SAS on a system-on-chip. The Ceva-SAS package is a far cry from off-the-shelf commodity cores for simpler protocols. The package is a modular offering that includes both software and hardware, delivering a solution that goes from an application programming interface (API) at the customer's RAID stack software down to the physical serial interface at the wires. With IP this complex, Ceva expects customers also will need customization, integration and deployment services. According to Paddy McWilliams, product-marketing manager for serial storage at Ceva, SAS is catching on rapidly as parallel SCSI runs out of steam. "What I expect to happen, as more and more players get into the market space, is that they will want it faster and won't want to develop it themselves," McWilliams said. Today, McWilliams said, there are ASIC vendors that offer SAS IP, but that IP restricts the user's choice to just one ASIC provider. Ceva, he claimed, is offering the "first open IP" for designers who want to be independent of ASIC vendors. Although Ceva is best known for its DSP cores, SAS is a natural choice, given the company's existing involvement in serial ATA. The company has licensed its serial ATA IP to a number of users, and it served as the starting point for the SAS IP. The SAS core, however, is probably two and a half times the size of Ceva's serial ATA core, McWilliams said. One reason it's a big core is that it supports three protocols: serial SCSI protocol, SCSI management protocol and serial ATA tunneled protocol. Other features include support for both initiator and target modes, SCSI SBC-2 end-to-end protection, narrow and wide ports, scalable context management and enhanced open/close/retry connection management. CEVA SAS software begins with a protocol abstraction layer that provides an API to the customer's application layer, manages inbound request and outbound response queues, and performs SAS discovery and domain validation. It runs on the customer's central I/O processor. Next comes the SASquad software. It runs on an embedded processor, typically the Ceva TeakLite II, a small DSP processor. The SASquad software provides transport-layer and port-layer overall control, context management, connection management and wide or narrow ports. Hardware includes the TeakLite II, a process-specific PHY layer, and control interface and protocol support. Users can license the entire solution or just the protocol or PHY elements. General release of the Ceva-SAS package is March 2006.
| |
All material on this site Copyright © 2005 CMP Media LLC. All rights reserved. Privacy Statement | Your California Privacy Rights | Terms of Service | |
|
Ceva, Inc. Hot IP
Related News
- K-micro Licenses CEVA Serial Attached SCSI (SAS) PHY for Enterprise Storage Applications
- CEVA Bluetooth® 5.4 IP Achieves SIG Qualification, Includes New Features to Address Rapidly Growing Electronic Shelf Label (ESL) Market
- Mobiveil Inc. and SiFive, Inc. partner to develop RISC-V based configurable SSD Platform For Data Center and Enterprise storage Applications
- NVMe Revision 1.3 Expands Reach of Fast Storage for Enterprise, Client, and Cloud Power Users
- Mobiveil to Exhibit at DAC in Avery Design Systems' Booth, Showcasing Portfolio of IP, Platforms, Solutions for Storage, IoT, Networking, Enterprise Markets
Breaking News
- Omni Design Technologies Joins Intel Foundry Accelerator IP Alliance
- Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
- TSMC Reports First Quarter EPS of NT$8.70
- Brisbane Silicon publishes DPTx 1.4 IP Core
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
Most Popular
- U.S. Subsidy for TSMC Has AI Chips, Tech Leadership in Sight
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
- Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass Production
- Silvaco Announces Expanded Partnership with Micron Technology
- OPENEDGES Unveils ENLIGHT Pro: A High-Performance NPU IP Quadrupling its Previous Generation's Performance
E-mail This Article | Printer-Friendly Page |