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Synopsys Collaborates with Keysight Technologies to Deliver Integrated Custom Design Flow for 5G Designs (Wednesday Mar. 24, 2021)
Synopsys, Inc. (Nasdaq: SNPS) today announced a collaboration with Keysight Technologies to seamlessly integrate Keysight's RFPro solution with Synopsys's Custom Compiler™ solution, enabling mutual customers to create 5G system-on-chip (SoC) designs.
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Siemens' Veloce Virtual Network App Certified for IxVerify 3.0 (Thursday Mar. 18, 2021)
Siemens Digital Industries Software today announced that its Veloce™ Network (VN) App is now certified for use with the Keysight IxVerify 3.0 software pre-silicon test solution.
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Cadence Unveils Next-Generation Sigrity X for Up to 10X Faster System Analysis (Wednesday Mar. 17, 2021)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the next-generation Cadence® Sigrity X signal and power integrity (SI/PI) solutions. Sigrity X features powerful new simulation engines for system-level analysis and includes the innovative massively distributed architecture of the flagship Cadence Clarity™ 3D Solver.
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Rockley Selects Synopsys for Silicon Photonics Design Solutions (Monday Mar. 15, 2021)
Synopsys, Inc. (Nasdaq: SNPS) today announced that Rockley Photonics, a leading global supplier of integrated optical chips and modules, has adopted Synopsys solutions to accelerate the design and verification of silicon photonics for sensing and datacom applications.
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SiPearl passes a key milestone for Rhea's launch by moving into an accelerated simulation phase with Siemens' Veloce platform (Thursday Mar. 11, 2021)
SiPearl, the company that is designing the high-performance, low-power microprocessor for the European exascale supercomputer, has just passed a key milestone for the launch of Rhea, its first generation of products, in 2022.
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Thalia successfully completes 20th 22nm analog IP reuse engagement (Thursday Mar. 04, 2021)
Thalia Design Automation, a leading IP reuse company and experts in targeted automation for analog and mixed signal design and migration, today announced the successful completion of its 20th analog IP portfolio migration into the 22nm technology node.
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Airborne System Design Assurance: Aldec Adds 60+ New HDL Rules to ALINT-PRO's DO-254 Plug-In (Thursday Mar. 04, 2021)
Aldec has added more than 60 new HDL rules to ALINT-PRO™’s DO-254 rules plug-in and has made several enhancements to the tool’s Design Entry capabilities to boost productivity.
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Synopsys Announces Euclide to Accelerate Design and Verification Productivity (Wednesday Mar. 03, 2021)
Synopsys, Inc. (Nasdaq: SNPS) today introduced Synopsys Euclide, the industry's next-generation hardware description language (HDL)-aware integrated development environment (IDE).
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Metrics Announces an EDA as a Service Partnership Program with Semiconductor Intellectual Property Vendors (Monday Mar. 01, 2021)
Metrics Design Automation, the first vendor to provide EDA as a Service in the cloud, today announced the launching of a new partnership program with semiconductor intellectual property (IP) vendors.
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Imperas Donates Latest RV32/64K Crypto (scalar) Architectural Validation Test Suites to the RISC-V Verification Ecosystem (Monday Mar. 01, 2021)
Imperas Software Ltd., the leader in RISC-V processor verification technology, today announced the release of the latest update to the RISC-V architectural validation test suites for the RV32/64K Crypto (scalar) extension.
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Synopsys Delivers Breakthrough Performance with New ZeBu Empower Emulation System for Hardware-Software Power Verification (Wednesday Feb. 24, 2021)
ZeBu Empower Enables Power Verification Turnaround Within Hours Using Real-World Software Workloads for AI, 5G, Data Center and Mobile SoC Applications
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Samsung Foundry Certifies Synopsys IC Validator for 5nm and 4nm Advanced Process Technologies (Monday Feb. 22, 2021)
Synopsys, Inc. (Nasdaq: SNPS) today announced that its IC Validator physical verification solution has been certified by Samsung Foundry for its most advanced 5-nanometer (nm) and 4nm process technologies.
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Veriest Solutions and CEVA develop functional safety verification methodology for automotive devices (Wednesday Feb. 17, 2021)
Veriest Solutions, the international Electronics Design Services house, today announced that its engineering team have collaborated with CEVA, the leading licensor of wireless connectivity and smart sensing technologies, to develop a functional safety verification methodology.
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Synopsys Selected for Rapid Assured Microelectronics Prototypes Program (Friday Feb. 05, 2021)
Synopsys, Inc. (Nasdaq: SNPS) today announced that it is collaborating with Microsoft in the Rapid Assured Microelectronics Prototypes (RAMP) program to support the development of integrated circuit hardware and workflow prototypes that incorporate Synopsys' assured design and manufacturing flows into Microsoft Azure.
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Pulsic Delivers Real-Time, Accurate, Layout Previews to Analog Circuits Designers with the new Animate Preview (Thursday Feb. 04, 2021)
Pulsic today announced Animate Preview, a new product for analog circuit engineers. Animate Preview gives engineers quick, easy and accurate physical information about their analog circuit while they develop their schematic.
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AWS and Arm Demonstrate Production-Scale Electronic Design Automation in the Cloud (Thursday Feb. 04, 2021)
By migrating semiconductor design and verification to AWS running on Graviton2-based instances, Arm is reducing cost and scheduling risks for new projects, increasing throughput by up to 10x, and freeing engineers to focus on innovation
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Mirabilis Design integrates Fast Functional Processors into VisualSim Architect to close the software design, development and validation loop (Wednesday Jan. 27, 2021)
Mirabilis Design announces VisualSim VPS, a platform that combines VisualSim hardware model with Gem5 Instruction Set.
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Samsung Foundry Certifies Analog FastSPICE Platform from Siemens for Early Design Starts on 3nm GAA Process Technology (Thursday Jan. 21, 2021)
Siemens today announced that its industry-leading tools for the verification of analog/mixed-signal (AMS) circuits are now qualified for early design starts on Samsung Foundry’s new 3nm Gate All Around (GAA) process technology.
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Powerful FPGA Design Creation and Simulation IDE Adds VHDL-2019 Support & OSVVM Enhancements (Wednesday Jan. 20, 2021)
Aldec has enhanced Active-HDL™ to support new features within VHDL-2019 (IEEE 1076-2019). These features simplify the language, lift certain restrictions that were present in earlier versions and introduce new application programming interfaces (APIs).
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Sondrel Selects Synopsys Fusion Design and Verification Platforms to Displace Legacy Design Tools (Tuesday Jan. 19, 2021)
Synopsys, Inc. (Nasdaq: SNPS) today announced Sondrel has adopted the Synopsys Fusion Design™ and Verification Continuum® platforms to accelerate the design and verification of large, complex system-on-chip (SoC) designs for automotive, AI, machine learning, IoT, consumer AR/VR gaming, and security applications.
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AWS Deploys Synopsys VCS on Arm-based AWS Graviton2 to Accelerate SoC Development (Thursday Dec. 17, 2020)
Synopsys, Inc. (Nasdaq: SNPS) today announced that Amazon Web Services, Inc. (AWS) has deployed VCS® Fine-Grained Parallelism (FGP) technology running on Arm®-based Graviton2 servers.
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Samsung Foundry Certifies Cadence System Analysis and Advanced Packaging Design Tool Flow for 2.5/3D Chip Designs (Thursday Dec. 17, 2020)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Samsung Foundry has certified the complete Cadence® system analysis and advanced packaging design tool flow as a Samsung Multi-Die Integration (MDI™) advanced packaging reference flow.
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OneSpin Contributes to the OpenHW Ecosystem to Achieve Processor Integrity for the CORE-V CVE4 Open-Source RISC-V Cores (Wednesday Dec. 09, 2020)
OneSpin Solutions, provider of certified IC integrity verification solutions for building functionally correct, safe, secure and trusted integrated circuits, announced that its 360 Design Verification (DV) solutions contributed to the speedy, successful, and bug-free delivery of the OpenHW CV32E40P RISC-V core.
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AImotive Deploys Synopsys VCS to Verify Next-Generation Automated Driving Technologies (Wednesday Dec. 09, 2020)
Synopsys today announced that AImotive has adopted Synopsys VCS® simulation and Verdi® debug, part of the Verification Continuum® Platform, to help verify its innovative aiWare™ hardware IP for Neural Network (NN) acceleration for automated driving applications.
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Silicon Labs selects Imperas RISC-V Reference Model for verification (Wednesday Dec. 09, 2020)
Imperas Software today confirmed the selection by Silicon Labs (NASDAQ: SLAB) of the Imperas RISC-V reference model as part of their RISC-V processor verification work.
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OneSpin Contributes to the OpenHW Ecosystem to Achieve Processor Integrity for the CORE-V CVE4 Open-Source RISC-V Cores (Tuesday Dec. 08, 2020)
OneSpin Solutions, provider of certified IC integrity verification solutions for building functionally correct, safe, secure and trusted integrated circuits, announced that its 360 Design Verification (DV) solutions contributed to the speedy, successful, and bug-free delivery of the OpenHW CV32E40P RISC-V core.
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Samsung Foundry Adopts Spectre X Simulator for 5nm Design (Tuesday Dec. 08, 2020)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Samsung Foundry has adopted the Cadence® Spectre® X Simulator for its latest 5nm PCI Express® (PCIe®) PHY IP for automotive, mobile, consumer and healthcare applications.
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Synopsys and Samsung Foundry Collaborate to Deliver Fastest Design Closure and Signoff for Process Nodes Down to 3nm (Thursday Dec. 03, 2020)
Signoff Flow Enables High-Performance Computing, 5G and AI Advanced Design to Achieve Fastest Time-to-Results with Superior Power, Performance and Area
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Rockley Photonics Collaborates with Cadence to Create a High-Performance System for Hyperscale Data Centers (Thursday Dec. 03, 2020)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Rockley Photonics, a leading supplier of integrated photonic solutions, has deployed a comprehensive set of Cadence® system analysis and custom tools to design a state-of-the-art, high-performance System-in-Package (SiP) for hyperscale data centers.
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Vidatronic Achieves up to 10X Speedup Using the Cadence Spectre X Simulator (Thursday Nov. 12, 2020)
Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Vidatronic, Inc. has successfully used the Cadence® Spectre® X Simulator to achieve leading electromigration and IR drop (EM-IR) reliability analysis on leading-edge 7nm and 5nm analog IP designs for mobile, hyperscale and other consumer electronics.