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Feb. 14, 2008 -
Distributed under the standard open-source Apache™ 2.0 license, the OVM source code, usage examples, and documentation may be downloaded free of charge from OVM World.
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Feb. 05, 2008 -
Tiempo develops and markets asynchronous IPs (microcontrollers, crypto-processors, interfaces) and EDA tools that allow semi-conductor companies to design ultra-low power, ultra-low noise, robust and secured chips.
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Jan. 29, 2008 -
Chartered Semiconductor Manufacturing Ltd., one of the world’s top dedicated foundries, announced that it has signed an agreement for a US$190 million term loan facility from Societe Generale.
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Jan. 21, 2008 -
EVE and CoWare today announced a strategic alliance to provide design teams with an integrated approach that ties hardware/software co-verification from EVE with SystemC virtual platforms developed with CoWare’s ESL 2.0 solutions.
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Jan. 14, 2008 -
Proven during trials at customer sites throughout the world and recently by STARC, the integrated flow is effective at synthesizing high-quality designs from pure ANSI C++ to RTL, and formally verifying that the resulting RTL design is functionally correct
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Jan. 09, 2008 -
UpZide Labs AB and Tensilica, Inc., today announced an expanded business relationship under which UpZide will take their reference Vectorized VDSL2 (second generation Very high-speed Digital Subscriber Line) design to market in a chipset using over 50 Xtensa LX2 configurable processors.
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Jan. 09, 2008 -
The OVM, based on IEEE Std. 1800(TM)-2005 SystemVerilog standard, is the first open, language interoperable, SystemVerilog verification methodology in the industry. The OVM provides a methodology and accompanying library that allow users to create modular, reusable verification environments in which ...
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Jan. 02, 2008 -
Derrick will assume overall responsibility for directing and growing the microprocessor and architecture business worldwide, reporting to John Bourgoin, MIPS Technologies' President and CEO.
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Dec. 18, 2007 -
ChipX today announced the introduction of Hybrid ASIC, the implementation of a structured ASIC as IP on a Standard Cell device. This development approach allows for rapid and economical product line development, saving companies an average of three-to-five hundred thousand dollars in non-recurring engineering ...
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Dec. 07, 2007 -
Nuvation’s Shanghai Design Center will augment the US and Canadian design centers with offshore capabilities, design localization for offshore manufacturing, dedicated Offshore Design Center (ODC) offerings, and access to the growing Chinese marketplace.
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Dec. 03, 2007 -
New Aspect-Oriented Generation Engine and Advanced Transaction-Based Acceleration; Supports Open Verification Methodology for SystemVerilog
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Dec. 03, 2007 -
The kits will be available for designers using UMC's logic/mixed-mode 65-nanometer standard performance (SP) process and logic/mixed mode RF 65-nanometer low-leakage (LL) process. The Cadence Virtuoso technology helps accelerate silicon-accurate design of analog, mixed-signal and RF devices.
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Dec. 03, 2007 -
Available as Silicon IP, DxO IPE solution leverages new generation DxO programmable and configurable SIMD RTL core optimized for on-the-fly image processing.
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Nov. 26, 2007 -
The Synplify DSP environment facilitates high-level modeling and hardware abstraction, constraint-driven algorithm synthesis into RTL and powerful system-wide optimizations for performance, area, and multi-channelization tradeoff exploration.
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Nov. 19, 2007 -
Horizon's Hz7120 HD-DVD/Blu-Ray SoC supports wide range of features and capabilities including conformance to leading video compression standards such as native high-definition 1080/60i & 1080/60p profiles of AVC/H.264, VC-1, MPEG-2 and DV/HDV, leading audio compression standards such as DTS-HD, Dolby ...
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Nov. 14, 2007 -
Purple Vision is a 150-person subsidiary of TES Electronic Solutions, providing differentiated services in the IC Design area. Founded in 2000, Purple Vision was acquired by TES in 2005. The company has achieved multiple, full-chip turnkey designs and has participated in over 150 silicon designs with ...
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Nov. 14, 2007 -
Freescale joins the original six steering committee members, ARM, Cadence, Mentor Graphics, NXP Semiconductors, ST Microelectronics, and Synopsys and together with LSI and Texas Instruments, completes the organization’s nine-member Board.
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Nov. 13, 2007 -
Altera Corporation and Synopsys today announced that Altera's popular Nios® II processor core will be available for licensing through Synopsys' DesignWare® Star IP Program.
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Nov. 13, 2007 -
Vivante and Global Unichip today announced that GUC has selected Vivante’s silicon proven scalable 2D and 3D graphics solutions for GUC's system-on-chip (SoC) designs.
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Nov. 12, 2007 -
Temento Systems ® SA announced today a Debug-on-Demand model available on its website in order to decrease the cost of debug tools for FPGA designs, while having access to advanced features.
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Nov. 05, 2007 -
New Release Greatly Simplifies the Adoption of ESL Technologies and Improves Design Efficiency Required to Deploy ESL and Accelerate Design Innovation
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Oct. 29, 2007 -
Recognition Underscores ARC's and Cadence's Ongoing Successes in Low-Power Product Development and International Joint Marketing
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Oct. 29, 2007 -
MIPS Technologies today announced that SiS Holding Ltd., a subsidiary of Silicon Integrated Systems Corp. (SiS), has licensed the MIPS32® 24KcTM synthesizable processor core to advance development of applications for consumer electronics
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Oct. 26, 2007 -
Formalizing an IP partnership with Jazz Semiconductor will facilitate Jazz's foundry customers access to KABEN's highly specialized IP and expertise in frequency synthesizers, advanced filtering, RF and mixed-signal designs.
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Oct. 22, 2007 -
HiDFT-Scan addresses a major problem in nanometer electronic circuit design: The ability to fulfill DFT closure requirements at the gate level has come to a standstill. As feature sizes have shrunk, designs have become more complex and the volume of test patterns has increased to the point where it ...
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Oct. 09, 2007 -
Xilinx, Inc. today announced that Vincent "Vin" Ratford, 56, has been promoted to vice president and general manager of the processing solutions group (PSG) from his current position as vice president of marketing, business development and silicon architecture for PSG.
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Oct. 01, 2007 -
Horizon's Hz7220 HD-DVD/Blu-Ray SoC supports wide range of features and capabilities including conformance to leading video compression standards such as high-definition 1080/60p profiles of AVC/H.264, VC-1, MPEG-2 and DV/HDV, leading audio compression standards such as DTS-HD, Dolby Digital Plus and ...
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Sep. 27, 2007 -
In this role, he is responsible for driving technology development of ChipVision's ORINOCO® low power design optimization EDA solution that helps companies achieve substantial power savings and complete their designs more quickly.
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Sep. 25, 2007 -
New HAPS-51 Delivers High-Performance and On-Board Memory for Faster SoC Verification; System to be Featured at Worldwide ASIC Verification Seminar Series Hosted by Synplicity and Xilinx
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Sep. 25, 2007 -
Cadence Encounter Synthesis and Implementation Technologies Now One of NEC Electronics America's Tapeout Methodologies of Choice for ARM Processor Implementations
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Sep. 20, 2007 -
By expanding its current ARM technology portfolio, which includes the ARM7TDMI®, ARM926EJ™, ARM922T™ and ARM946E™ processors, GUC will also be able to make ARM physical design, system design and development tools available to its customers in volume and accelerate time-to-market.
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Sep. 20, 2007 -
Tokyo Electron Device, Ltd. (TED) ASIC customers now have access to DDR PHY designs, in 90-nm process technologies and below, that integrate seamlessly with other DFI compatible designs, including Denali's Databahn(TM) DDR memory controller products.
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Sep. 17, 2007 -
The Hz4120 and Hz3120 integrate real time dual HD AVC, VC-1, DV/HDV or MPEG2/4 decoder & AVC, VC1, MPEG2/4 encoder/transcoder, along with an advanced audio processor, embedded application CPU, 2D/3D graphics accelerator and multi-plane display processor into a single chip, thus enabling end-users to ...
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Sep. 17, 2007 -
The library provides high- performance SystemC transaction-level simulation models (TLMs) for assembling virtual platforms, including instruction set simulators (ISS), and TLMs of Synopsys' DesignWare Cores and ARM® AMBA® interconnect components. All DesignWare System-Level Library models are written ...
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Sep. 10, 2007 -
This low-power reference design methodology (LP-RDM) together with the Cadence® Low Power Solution ensures that ARC’s new Energy PRO technology is captured in RTL and implemented consistently throughout the design flow to GDSII. Users of the reference design flow may achieve up to a four-fold reduction ...
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Sep. 04, 2007 -
The two companies have collaborated and now offer highly adaptable PCI Express digital cores and PHY IP from Rambus, tightly integrated and verified with Cadence verification IP.
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Aug. 27, 2007 -
The kit provides complete example verification plans, transaction-level and cycle-accurate models, design and verification IP, scripts and libraries -- all proven on a wireless segment representative design and delivered through applicability consulting.
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Aug. 23, 2007 -
The Accellera OVL standard includes a library of assertion checkers provided as an open standard. It improves electronic design verification when using Hardware Description Languages (HDLs) and results in better quality designs by enabling effective use of ABV methodologies.
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Aug. 23, 2007 -
Kilopass XPM technology is the world’s first high-density embedded NVM technology verified in silicon and available for design in 65 nm standard logic CMOS processes. Kilopass is also making XPM-65LP and XPM-65G+ evaluation kits available to its customers.
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Aug. 22, 2007 -
Sonics announced today that Sonics SMART Interconnect solutions are now available as library elements for Mentor Graphics' Vista(TM) and Visual Elite(TM) products. Mentor Graphics now offers a complete configuration, analysis and verification of SystemC SoC platforms based on Sonics SMART Interconnect ...