The security strength of many systems and applications is dependent on the quality of random number generators. Many cryptographic operations require a source of random numbers, such as the creation of cipher keys.
The DesignWare® True Random Number Generator (TRNG) Core combines a whitening circuit with a noise source that may be used to seed a random number stream as well as provide an ongoing source of entropy. The core is therefore classified as a Non-deterministic Random Bit Generator (NRBG) using the terminology preferred by the National Institute of Standards and Technology (NIST). The noise source does not depend on process-specific circuitry and is therefore very portable across different ASIC and FPGA fabrication technologies.
Designed for compliance with FIPS 140-2 and FIPS 140-3 (draft)
Area: 15-20K ASIC gates
High speed operation: 50 Mbps at 200 MHz
Configurable for ASIC and FPGA
Redundant internal seed generators
Lockup-free LFSR design
Automatic and manual reseeding
Two independent background automatic reseed modes
Shift register compatible output stream for auxiliary uses: Differential power analysis; Timing analysis; IPsec