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SMIC 32-bit microprocessor IP Listing

5 IP Cores

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High-Performance Low-Power 32-bit RISC core

The C310 is a member of theC*Core TM High-Performance Low-Power 32-bit RISC core family. It has been designed for high-performance and cost-sensitive embedded applications, with particular emphasis ...

1
I2C Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus)

The Digital Blocks DB-I2C-MS-AXI Controller IP Core interfaces a microprocessor via the AXI system Interconnect Fabric to an I2C Bus. The I2C is a two-wire bidirectional interface standard ...

2
I2C Master / Slave Controller w/FIFO (AHB & AHB-Lite Bus)

The Digital Blocks DB-I2C-MS-AHB Controller IP Core interfaces a microprocessor via the AHB system Interconnect Fabric to an I2C Bus. The I2C is a two-wire bidirectional interface standard ...

3
I2C Master / Slave Controller w/FIFO (APB Bus)

The I2C Master / Slave Controller IP Core interfaces a microprocessor via the APB system Interconnect Fabric to an I2C Bus. The I2C is a two-wire bidirectional interface standard (SCL is Clock, ...

4
I2C Master Controller w/FIFO (AXI & AXI-Lite Bus)

The Digital Blocks DB-I2C-M-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AXI System Interconnect Fabric to an I2C Bus. ...

5

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SMIC 32-bit microprocessor IP Listing

High-Performance Low-Power 32-bit RISC core

I2C Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus)

I2C Master / Slave Controller w/FIFO (AHB & AHB-Lite Bus)

I2C Master / Slave Controller w/FIFO (APB Bus)

I2C Master Controller w/FIFO (AXI & AXI-Lite Bus)

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