IP99, Virage Logic sponsor system-chip design contest
IP99, Virage Logic sponsor system-chip design contest
By Michael Santarini, EE Times
January 11, 1999 (2:09 p.m. EST)
URL: http://www.eetimes.com/story/OEG19990111S0025
Core vendor Virage Logic Inc. (Fremont, Calif.) and IP99 conference organizers have jointly announced the first annual IP99 SOC Design Contest. According to the organizers, entries will be judged on the level of innovation and creative use of intellectual property and memory cores in the development of systems-on-chip. Event organizers have assembled a judging panel of industry experts, including Yervant Zorian, chief technology adviser at Logic Vision Inc.; King Pang, vice president of engineering, consumer products division, LSI Logic Corp.; and Sang Wang, co-founder of Epic Design Technology Inc. and now an independent investor and adviser to electronic design companies. Winners will be announced at IP99 on Tuesday, March 23, at a 6:30 p.m. dinner event and industry panel discussion at the Santa Clara Convention Center. Grand prize will be a free memory IP core from Virage Logic (valued up to $50,000), or a credit for $50 ,000 that can be used toward the purchase of any standard product in the Virage Logic catalog. In addition, each grand-prize design team member, up to a total of six members, will receive a digital camera to recognize individual accomplishment. First-place winning teams in each category will be recognized with a $500 gift certificate toward a celebration party in their home town at the establishment of their choice. Participants may choose among three application categories: consumer, communications or computers; or three technology categories: non-volatile, DRAM or other memory structures. A design does not need to be in production to be considered; however, it must be taped out. To get an application, including all design criteria, contact Nilu Aghel at Virage Logic, (510) 360-8011, e-mail nilu@virlog.com or visit the Virage Logic Web site. All entries must be postmarked no later than Feb. 15.
Related News
- IP99: Programmable role explored for system-chip ICs
- ASUS Employs Virage Logic's Sonic Focus(R) Technology and Bang & Olufsen ICEpower Audio System Design to Deliver High Quality Sound on Their NX90 Notebook PC
- Virage Logic Introduces New Product for Post Silicon Bring Up and System Debug
- New Intel group will drive system-chip design
- Virage Logic Broadens Its Silicon Aware Intellectual Property (IP) Offering with New Release of the STAR(TM) Memory System
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |