HDL Design House announces HVT M25PX VITAL behavioral model

Belgrade, Serbia – August 23rd, 2010 - HDL Design House has announced the VITAL HVT M25PX behavioral simulation model for Numonyx M25PX16, a 16 Mbit (2 Mb x 8) serial flash memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus, with clock speeds per line at up to 75MHz.

Apart from the standard serial flash memory instructions, the VITAL HVT M25PX supports two new, high-performance dual input/output instructions:

• Dual Output Fast Read (DOFR) instruction used to read data at up to 75 MHz by using both pin DQ1 and pin DQ0 as outputs
• Dual Input Fast Program (DIFP) instruction used to program data at up to 75 MHz by using both pin DQ1 and pin DQ0 as inputs

The VITAL HVT M25PX behavioral model completely simulates the functionality of real component behavior  and all component timing behavior. This implies complete functionality, timing on inputs and outputs, all desired relations between input signals (setup/hold , pulse with, etc.) and all delays between inputs and outputs.  VITAL model  contains information about 3 values of timing parameters: minimum/typical/maximum. Timing parameters are loaded from SDF file at the elaboration phase and it is possible to use either minimum or typical or maximum values simultaneously for all timings.  The VITAL HVT M25PX behavioral model detects timing violation and reports it by using standard VITAL functions. The code is written in Verilog and VHDL and the model is highly portable across a range of  simulators.

 Key Features:

• VHDL '93, Verilog and VITAL'2000 compliant
• Requires VITAL'2000 library for correct compilation
• Timing backannotation by means of an SDF files
• Models are written at a behavioral level, do not reveal intellectual property, and are not synthesizable
• 75 MHz frequency in full voltage range
• Voltage range: 2.3/2.7..3.6 V
• 4 KB erasable sub sectors, 64 KB erasable sectors
• Dual I/O, thereby doubling the speed of data throughput (150 MHz)
• 16 Bytes of unique ID
• 64 Bytes of OTP
• Software and hardware write protect available
• Broad package offering: SO8N, SO8W, MLP 5 x 6 & SO16W, MLP 6 x 8
• Automotive certified parts available

The VITAL HVT M25PX behavioral model is used for board-level and/or system level verification. In test environment, the device under test (DUT) is connected to the VITAL HVT M25PX component.

The VITAL HVT M25PX behavioral model can be used along with HDL DH SPI flash memory controller IP core (HIP 3100). The HIP 3100 IP core is an advanced controller for SPI flash memories which off-loads host CPU from direct data transfer control of SPI flash memory. The host CPU can program SPI controller specifying the type of data transfer (SPI instruction, address, data, etc) and SPI controller executes requested transfer. For more information about HDL DH SPI flash memory controller IP core (HIP 3100), please visit http://www.hdl-dh.com/prodbroch/HIP3100.01.04.2009.pdf.

VITAL behavioral models are products of close cooperation of  HDL Design House (HDL DH) and Free Model Foundry (FMF) company. HDL DH and FMF have developed thousands of VITAL models. The VITAL model package consists of VHDL and Verilog source code, memory preload files (when appropriate), FTM and SDF files, test cases package file and documentation. The HVT M25PX model  and other VITAL models are available for download free of charge from the FMF website (http://www.freemodelfoundry.com).

If you are interested in finding out more about the HVT M25PX VITAL model, please visit www.hdl-dh.com or download model source code from the following link: http://www.freemodelfoundry.com

About HDL Design House:

HDL Design House delivers leading-edge digital and analog, design and verification services and products in numerous areas of SoC and complex FPGA designs. The company develops IP cores and provides complete design and verification services for complex SoC projects. The company also delivers component (VITAL) models for major SoC product developers. Dedicated to fulfilling each customer's unique requirement, HDL Design House has established a reputation as a reliable partner with high-quality products and services, flexible licensing models, competitive pricing and responsible technical support. The company enables customers to concentrate on system-level work and be confident that the various system components have been fully and reliably engineered and tested.

Founded in 2001, HDL Design House has 60 employees in two design centers – in Belgrade and Cuprija (Serbia). The company was awarded ISO 9001:2000 and ISO 27001:2005 certifications in December 2006 and has achieved certifications from Direct Assessment Services (DAS), thereby meeting United Kingdom Accreditation Service (UKAS) regulatory requirements. With ISO 27001:2005 certification, the highest certification standard for information security available, HDL Design House becomes the first company in Serbia to comply with this standard. In 2006 the company was awarded the SME Exporter of the Year by  Serbia Investment and Export Promotion Agency (SIEPA).

About FMF:

Founded in 1995, Free Model Foundry is dedicated to promoting standard modeling practices within the electrical engineering community. In particular, we support the use of VHDL, Verilog, and SystemVerilog modeling languages.

One service provided by FMF is to help IC and IP vendors increase the rate of adoption of their products by providing accurate, uniform, functional models to expedite evaluation and selection by designers of electronic systems. Our staff of experienced modeling engineers has developed models simulating over 11,000 parts and takes pride in the ease of use and accuracy of results its products offer.

Free Model Foundry (FMF) believes in free, open source distribution of simulation and analysis models of electronic components. It promotes the development, distribution and sharing of functional simulation models (with timing) for board level components and open source behavioral models for proprietary IP.