Cadence Recognized with Three TSMC Partner of the Year Awards
Cadence recognized for joint development of 7nm FinFET Plus design infrastructure and 12FFC design infrastructure and the joint delivery of the automotive design enablement platform
SAN JOSE, Calif., Sep 18, 2017 -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it has received three TSMC Partner of the Year awards at this year’s TSMC Open Innovation Platform® (OIP) Ecosystem Forum. Cadence was presented with awards for the joint development of the 7nm FinFET Plus design infrastructure and the 12nm FinFET Compact (12FFC) design infrastructure and the joint delivery of the automotive design enablement platform.
The awards for the joint development of the 7nm FinFET Plus design infrastructure and 12FFC design infrastructure were awarded based on the early, in-depth collaboration between TSMC and Cadence on FinFET technology enablement and the development of the latest advanced-node solutions for next-generation system-on-chip (SoC) designs. Cadence secured the award for the joint delivery of the automotive design enablement platform based on collaboration and support of aging simulation and advanced electromagnetic (EM) rules for the 16FFC process.
“Cadence continues to partner with TSMC to deliver the innovation and deep technical expertise that is required to address evolving requirements for the latest process nodes, such as 7nm FinFET Plus and 12FFC, and within growth industries, such as automotive,” said Dr. Anirudh Devgan, executive vice president and general manager of the Digital & Signoff Group and the System & Verification Group at Cadence. “These awards from TSMC highlight Cadence’s dedication to delivering the innovative tools that our customers need for advanced SoC and automotive designs.”
“Throughout the history of our long, collaborative relationship with Cadence, they have consistently delivered high-quality results and continue to invest in the most advanced technologies as demonstrated by the latest developments in 7nm FinFET Plus, 12FFC and automotive design enablement,” said Suk Lee, senior director of the Design Infrastructure Marketing Division at TSMC. “The awards are indicative of our close collaboration with Cadence, and we look forward to continuing the development of advanced-node solutions for our mutual customers.”
About Cadence
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.
|
Cadence Hot IP
Related News
- Cadence Recognized with Four 2018 TSMC Partner of the Year Awards
- Cadence Recognized with Four TSMC Partner of the Year Awards
- Cadence Receives Three TSMC Partner of the Year Awards for Design IP, 16nm FinFET and 3D-IC Solutions
- Cadence Wins Four 2023 TSMC OIP Partner of the Year Awards
- Cadence Wins Six 2022 TSMC OIP Partner of the Year Awards
Breaking News
- CAN FD Controller & LIN 2.1 Controller IP Cores, Available for Immediate Licensing with Proven Automotive Compatibility
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- TSMC Celebrates 30th North America Technology Symposium with Innovations Powering AI with Silicon Leadership
- TSMC plans 1.6nm process for 2026
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
E-mail This Article | Printer-Friendly Page |