IP08 Conference Presentations
Missed IP08 Conference ?
Or just want to review what you have heard in a session ?
See IP 08 Presentations from IP Industry Leaders online.
Standard & Integration
- "Tailored SoC building using reconfigurable IP blocks" by Lodewijk Smit, Gerard Rauwerda, Jochem Rutgers, Maciej Portalski & Reinier Kuipers from Recore Systems
- "CUSTOMIZABLE SoC SPEAr® FROM STMicroelectronics SOLVING TIME TO MARKET ISSUES" by Matteo Mazzola, Bruno Cristofoli, Henry Le Henaff & Alain Pasteur from ST
- "Enabling Secure Integration of Multiple IP Cores in the Same FPGA" by Bassel Soudan from University of Sharjah, Wael Adi from Technical University of Braunschweig, Abdulrahman Hanoun from Technical University of Hamburg
- "Practical Design and Implementation of a Configurable DDR2 PHY" by Lior Amarilio from ChipX
- "A generalized waveform synthesis mechanism for software radio" by Maurizio Colizza & Fabio Graziosi from Westaquila, Claudia Rinaldi from University of L'Aquila
- "DDR SDRAM Controller IP Designed for Reuse" by Alexsandro Bonatto, André Soares & Altamiro Susin from UFRGS
- "Stochastic Computation applied to the design of Error Correcting Decoders" by Gordon Harling from WideSail Technologies, Warren Gross & Shie Mannor from McGill University
- "A multi-purpose Digital Controlled Potentiometer IP-Core for nano-scale Integration " by Reimund Wittmann, Ralf Kakerow & Harald Bothe from IP Gen Rechte GmbH, Werner Schardein from University of Applied Sciences and Arts, Dortmund
- "uBIP: A Simplified Microcontroller Architecture for Education in Embedded Systems Design " by Maicon PEREIRA & Cesar ZEFERINO from UNIVALI
- "A 1-10Gbps SerDes IP in 65nm CMOS Technology" by Afshin Rezayee, Angus McLaren, Saman Sadr, Robert Wang & Mehrdad Ramezani from SnowbushIP
- "Debug and testability features for multi-protocol 10G SerDes" by Claude Gauthier, Shaishav Desai & Sanjay Dabral from Prism Circuits
- "H.264 Baseline Encoder With ADI Blackfin DSP and Hardware Accelerators" by Anand V Kulkarni, Wipro Technologies and Shankar Malladi, Analog Devices Inc.
SoC Design and Reuse
High Level Modeling
NoC & SoC