English
Powering RISC-V SoC With 1 To 1000s Cores
Charlie Su, CTO & EVP, Andes Technology
2019 RISC-V CON Silicon Valley
Posted on Thursday Nov. 07, 2019
-
Search IP
- Categories
- Featured Products
-
News
- Categories
- Latest News
-
Industry Articles
- Categories
- Featured Articles
- Blogs
The Next Generation RISC-V Processors AndesCore™ 27, 45 Series
Status Update of RISC-V P Extension Task Group
Fast yet Low Power RISC-V Core IP for SoC Designers
Andes Technology at IP SoC Santa Clara 2019