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Powering RISC-V SoC With 1 To 1000s Cores
Charlie Su, CTO & EVP, Andes Technology
2019 RISC-V CON Silicon Valley
Posted on Thursday Nov. 07, 2019
Andes Technology Corp. Channel
Fast yet Low Power RISC-V Core IP for SoC Designers
20:20
Andes Technology at IP SoC Santa Clara 2019
3:16
Fast yet Low Power RISC-V Core IP for SoC Designers20:20
Andes Technology at IP SoC Santa Clara 20193:16