May. 15, 2014 - Cadence today announced the availability of the industry's first verification IP (VIP) supporting PCI Express® (PCIe®) 4.0 architecture. This VIP enables designers to quickly and thoroughly complete the functional verification for their system-on-chip (SoC) designs with less effort and greater assurance ...

May. 15, 2014 - IPextreme Inc. today welcomed Methods2Business, B.V. as the newest member of its Constellations™ initiative, which brings together like-minded companies to advance the state of the global semiconductor intellectual property (IP) ecosystem.

May. 07, 2014 - Synopsys today announced it has collaborated with longtime automotive silicon pioneer Freescale® Semiconductor to create a Center of Excellence program to speed development of automotive electronic system software.

Apr. 24, 2014 - Accellera Systems Initiative announces two new libraries have been released for the SystemC core language (SystemC 2.3.1) and SystemC verification (SCV 2.0). Ratified as IEEE Std. 1666-2011™ "Standard SystemC Language Reference Manual, “SystemC is a high-level language used in the design and development ...

Apr. 10, 2014 - From the leading edge of design to older process nodes, development costs are being contained much better than the initial reports would indicate. But not always for the obvious reasons.

Apr. 02, 2014 - Cortus, a technology leader in low power, silicon efficient, 32-bit processor IP, and CMOS image sensor solution company, Pyxalis, announce that Pyxalis has been using Cortus APS cores in multiple design projects.

Mar. 25, 2014 - Synopsys today unveiled a new initiative to accelerate the verification of mixed-signal system-on-chip (SoC) designs. Launched today are the initial components of the initiative, which include a SystemVerilog-based methodology, AMS Testbench, and the new VCS® AMS mixed-signal verification solution ...

Mar. 05, 2014 - Mentor Graphics today announced it has proposed that a new Accellera standards committee be formed to investigate the standardization of a graph-based test specification standard. To underscore this endeavor, Mentor will make a technical donation of its existing graph-based test specification format ...

Feb. 14, 2014 - CEA-Leti and STMicroelectronics have presented the successful demonstration of an ultra-wide-voltage range (UWVR) digital signal processor (DSP), based on 28nm ultra-thin body buried-oxide (UTBB) FD-SOI technology.

Feb. 11, 2014 - Sonics today announced the issue of patent 8,601,288 "Intelligent Power Controller" from the US Patent Office. Sonics' "Intelligent Power Controller" patent describes a hardware intellectual property (IP) that forms the foundation for the company's development of innovative power management solutions ...

Jan. 31, 2014 - CoinTerra™, the high performance and value leader in ASIC Bitcoin mining hardware announced today that they have started delivering their eagerly-anticipated TerraMiner™ IV professional Bitcoin miner – the first to market which breaks the one terahash barrier.

Jan. 30, 2014 - CircuitSutra Technologies, an ESL design IP & Services company, announced that it will showcase its synthesizable modeling IP for ARM® AMBA® AXI™ at the upcoming conference IESA Vision Summit, 3rd Feb in Bangalore.

Jan. 28, 2014 - Sonics today signed a new representation agreement with Chipware Technologies, Bangalore, India. Chipware will represent Sonics' full line of on-chip network products and services for the growing Indian market.

Jan. 16, 2014 - Arteris today announced the availability of FlexNoC Composition, a new feature embedded within the FlexNoC interconnect IP fabric. Companies that license FlexNoC can now integrate the individual interconnects from all SoC subsystems into one.

Jan. 14, 2014 - ARM and UMC today announced an agreement to offer the ARM® Artisan® physical IP platform along with POP™ IP for UMC’s 28nm high-performance low-power (HLP) process technology.

Dec. 10, 2013 - Xilinx today announced availability of its 20nm All Programmable UltraScale™ portfolio with product documentation and Vivado® Design Suite support. Xilinx shipped its first 20nm silicon in early November 2013, continuing to execute on an aggressive UltraScale device rollout. These devices deliver ...

Dec. 10, 2013 - Arrow Devices has launched a revolutionary new debugging tool – the Protocol Debugging Assistant (PDA). This debug tool works with existing verification environments and methodologies, and is useful for efficiently debugging issues on SOCs that employ all types of interface and bus protocols.

Nov. 26, 2013 - Xilinx today announced its comprehensive functional safety design package for industrial, automotive, medical, aerospace and defense applications according to IEC 61508 and ISO 26262 safety standards.

Nov. 22, 2013 - GLOBALFOUNDRIES today unveiled details of a project that demonstrates the value of its open and collaborative approach to delivering next-generation chip packaging technologies.

Nov. 11, 2013 - CoinTerra and design partner Open-Silicon today announce the tape out of GoldStrike1™ 28nm ASIC Chip. The ASIC is expected to exceed 500 Gh/s in hash performance, packing around 1.5 GH/s per mm2 while consuming less than 0.6 W per Gh/s.

Nov. 07, 2013 - PLDA today announced QuickPCIe Lite IP for FPGA, offering the industry’s only solution for a plug and play PCIe experience. PLDA’s innovative QuickPCIe Lite product is designed to work directly “out of the box” and does not require a customer to manipulate PCIe concepts, whether at the hardware ...

Oct. 29, 2013 - eASIC and Computer Simulation Technology (CST) have teamed up to significantly reduce multi-level PCB package design and simulation.

Oct. 24, 2013 - ARM and Spreadtrum today announced a sweeping license agreement providing Spreadtrum with the full range of ARM® Artisan® physical IP, including POP™ IP, for the broad range of IC foundry and process varieties of 28nm that ARM supports to deliver the most flexible manufacturing options.

Oct. 14, 2013 - The new MIPS P5600 core delivers industry-leading 32-bit performance together with class-leading low power characteristics in a silicon footprint up to 30% smaller than comparable CPU cores, making it ideal for a wide range of mobile, consumer and embedded applications.

Oct. 10, 2013 - Together with its coalition of Constellations companies, IPextreme, Inc. today announced a fresh, new addition to the annual Semico IMPACT Conference: an afternoon technical track session for engineers and designers.

Oct. 01, 2013 - Synopsys today announced availability of the latest release of its Virtualizer™ tool set for creating Virtualizer Development Kits (VDKs), software development kits which use virtual prototypes to accelerate embedded software development, debugging and optimization.

Sep. 20, 2013 - Cadence announced today that its digital, custom and signoff tools have implemented methodology innovations that allow customers to achieve TSMC’s 16nm FinFET process benefits of higher performance, lower power consumption and smaller area.

Sep. 17, 2013 - TSMC today released three silicon-validated Reference Flows within the Open Innovation Platform® (OIP) that enable 16FinFET systems-on-chip (SoC) designs and 3D chip stacking packages.

Sep. 11, 2013 - HDL Design House today announced that its MIPI CSI-2 Transmitter (HIP 3900) digital IP core, compliant with the MIPI Alliance CSI-2 Specification, has been successfully integrated into Fujitsu Semiconductor Europe GmbH's APIX® Companion Chip.

Sep. 09, 2013 - Synopsys today announced availability of its DesignWare® STAR Hierarchical System, an automated hierarchical test solution for efficiently testing SoCs, including analog/mixed-signal IP, digital logic blocks, memory and interface IP.

Sep. 06, 2013 - Cadence today announced the availability of the industry’s first verification IP (VIP) supporting the new HDMI 2.0 specification. The Cadence VIP for HDMI 2.0 supports all major logic simulators, verification languages, and methodologies including the Universal Verification Methodology (UVM).

Aug. 06, 2013 - At MemCon 2013 today, Cadence, announced the immediate availability of new verification IP (VIP) models for the latest memory standards--LPDDR4, Wide I/O 2, eMMC 5.0, HMC and DDR4 LRDIMM.

Jul. 24, 2013 - Is there a major business model change about to hit the semiconductor industry? Maybe we should start talking about design-lite companies...

Jul. 18, 2013 - Cadence announced today that Fujitsu Semiconductor Limited has reduced the regression verification time for a system-on-chip (SoC) design by 3X using the Incisive® Enterprise Simulator and the Incisive Enterprise Manager.

Jul. 10, 2013 - ASSET® InterTech, the leading supplier of tools for embedded instrumentation, today acquired the business of Arium, an Irvine, California provider of software debug tools for systems based on Intel® and ARM® processors.

Jul. 08, 2013 - Cadence today announced that TSMC has expanded collaboration with Cadence on the Virtuoso custom and analog design platform to design and verify its own cutting-edge IP.

Jun. 19, 2013 - Synopsys today announced that OCZ has achieved first-pass silicon success for its NAND flash Vector SSD using Synopsys' DesignWare® DDR2/3-Lite PHY, Embedded Memories, STAR Memory System® solution and Professional Services.

Jun. 12, 2013 - Synopsys today announced an extension to its DesignWare® Duet Embedded Memory and Logic Library IP portfolio specifically designed to enable the optimized implementation of a broad range of processor cores.

Jun. 06, 2013 - The integrated flows by Duolog and Jasper will enable IP/SoC development teams to deliver qualified, integration-ready IP and SoC assembly that is seamlessly verified using formal verification methods.

May. 30, 2013 - Forte Design Systems and CircuitSutraannounced today they will partner to provide design services throughout India to support the growing system-on-chip (SoC) market.