TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries, multiple metalstacks
1623 Results (121 - 160) |
-
SEMIFIVE Raises $109 Million in Series B Funding
Feb. 17, 2022 - SEMIFIVE, a leading design solution provider and pioneer of platform-based custom silicon solutions, today announced it has raised $109 million in its Series B funding round. -
Tektronix Delivers Industry-First PCI-Express 6.0 Test Solution
Feb. 16, 2022 - Tektronix, Inc., introduces the industry's first PCI Express 6.0 compatible Base transmitter test solution just weeks after the PCI-SIG® working group released PCI Express (PCIe) 6.0 Base specifications and validation requirements. -
Qorvo Selects Cadence Design Systems for US Government SHIP-RF Program
Feb. 16, 2022 - Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced participation in Qorvo’s State-of-the-Art Heterogeneous Integrated Packaging (SHIP-RF) Design Center. -
sureCore announces technology for in-memory computing
Feb. 08, 2022 - sureCore, the ultra-low power, embedded memory specialists, has announced its new technology for in-memory computing called CompuRAM™. This will enable solutions for computing at the Edge to be more power efficient. -
Siemens joins Intel Foundry Services' EDA Alliance program
Feb. 07, 2022 - Siemens Digital Industries Software today announced it has become a charter member of the Intel Foundry Services (IFS) Accelerator - EDA Alliance, a program committed to establishing an ecosystem for the design and fabrication of next generation System-on-Chip (SoCs) manufactured on IFS’ leading-edge ... -
Successful conclusion of European Processor Initiative Phase One
Dec. 22, 2021 - The European Processor Initiative (EPI), a project with 28 partners from 10 European countries aiming to make the EU achieve independence in high-performance computing (HPC) chip technologies and infrastructure, is proud to present key results achieved in phase one (2018-2021). -
sureCore delivers ultra-low power register files with more than 50% less power than off-the-shelf versions
Dec. 09, 2021 - sureCore, the ultra-low power, embedded memory specialists, continues developing technologies to reduce SoC power consumption thereby enabling developers to extend battery lives. Its latest innovation is MiniMiser™ that reduces the power consumption of register files by over 50%. -
Avery Design Partners with S2C to Bring PCIe 6.0 and LPDDR5 and HBM3 Speed Adapters to FPGA prototyping solutions for Data Center and AI/ML SoC Validation
Dec. 07, 2021 - Avery Design Systems, a leader in functional verification solutions, today announced the latest in native FPGA speed adapters for PCIe® Gen6 and advanced memory technologies for LPDDR5 and HBM3. -
Sondrel's modules accelerate implementation of new ASIC designs
Dec. 07, 2021 - Sondrel has revealed that its recently launched family of Architecting the future™ IP platforms are very easy to modify to precisely match customers’ ASIC requirements. -
Agnisys Delivers Novel AI Technology and FPGA Support for IP and SoC Specification Automation
Dec. 01, 2021 - Agnisys, Inc.®, the leading EDA provider of the industry’s most comprehensive solution for Design and Verification of SoC Hardware/Software Interface (HSI), today announced availability of a unique AI-based approach for specification of assertions and a new product to support FPGA development. -
sureCore designs special high performance multi-port memory for Semidynamics AI chip
Nov. 18, 2021 - sureCore, the embedded memory specialist, has designed a power and area efficient, high performance, multi-port, embedded memory solution for Semidynamics’ new RISC-V-based, tensor processing chip. -
Codasip Expands Ecosystem with XtremeEDA
Nov. 04, 2021 - Codasip, the leading supplier of customizable RISC-V processor IP, today announced that it has signed XtremeEDA - a Design and Functional Verification services to the ASIC, SoC, and FPGA hardware industry - as a Codasip Certified Design Services Company. -
Sondrel develops Performance Verification Environment to fast-track ASIC creation
Nov. 03, 2021 - Sondrel has developed a methodology that it calls its Performance Verification Environment (PVE) that enables it to create a Synopsys® SystemC simulation model where various parameters can be easily tweaked to see what effect this has on the meeting of the desired performance specification. -
Rapid Silicon Announces Seed Funding of $15M
Oct. 28, 2021 - Rapid Silicon, a provider of AI-enabled application-specific FPGAs based on open-source technology, today announced $15 million in seed funding led by ChengWei Capital and Cambium Capital. -
Synopsys Expands Strategic Technology Collaboration with TSMC to Extend 3D-System Integration Solutions for Next-Generation High-Performance Computing Designs
Oct. 20, 2021 - Synopsys, Inc. (Nasdaq: SNPS) today announced it has expanded its strategic technology collaboration with TSMC to deliver the next level in system integration to address the increasingly critical performance, power and area targets for high-performance computing (HPC) applications. -
Arm transforms the economics of IoT with Virtual Hardware and a new solutions-led offering
Oct. 19, 2021 - Arm today unveiled Arm® Total Solutions for IoT, a unique approach to Internet of Things (IoT) design that will lay the foundation for a new IoT economy. -
Thalia announces new CEO and board structure to support continued growth
Oct. 05, 2021 - Founder and former Chief Technology Officer Sowmyan Rajagopalan takes the role of CEO with immediate effect. The Thalia Board, led by executive chairman Rodger Sykes, has been expanded and an Advisory Board appointed to support and accelerate business growth. -
Next generation intelligent wearables enabled by sureCore's ultra-low power memory
Oct. 05, 2021 - As the market for wearable electronics and earbuds grows dramatically, architects are adding more features or ‘smarts’ to create product differentiation. The additional intelligence means that designers are required to add more embedded memory to the chip resulting in increased power demands. -
GF and Synopsys Deliver New Reference Flows for GF 22FDX Process: Cloud-Qualified and First Automotive Flow for ASIL-D Designs
Sep. 16, 2021 - GlobalFoundries® (GF), the global leader in specialty semiconductor manufacturing, and Synopsys, Inc. (Nasdaq: SNPS) today announced that GF has qualified two key Synopsys reference flows for its 22FDX™ process -
QuickLogic Announces New eFPGA Contract
Sep. 02, 2021 - QuickLogic Corporation (NASDAQ: QUIK), a developer of ultra-low power multi-core voice-enabled SoCs, embedded FPGA IP, and Endpoint AI solutions, today announced that it has won a $2 million eFPGA Contract. -
sureCore announces development of cryo-CMOS IP that will unlock Quantum Computing's potential
Sep. 01, 2021 - sureCore, the ultra-low power embedded IP specialist, has announced that it is developing a range of CMOS IP suitable for operation at the extremely low temperature required for Quantum Computing (QC) applications. -
Engineering recruitment stepped up by surge in demand for ultra-low power memory solutions
Aug. 24, 2021 - sureCore, the ultra-low power memory specialists, is surfing the wave of demand for ever more intelligent wearable devices that are only possible if they use the company’s specially designed SRAM IP that can cut memory power requirements by up to 50%. -
Motivo, Inc. Raises $12 Million Series A to Accelerate AI-Enabled Chip Design and Improve Manufacturing Yields
Aug. 16, 2021 - Motivo today announced it raised a $12 million Series A financing round led by Intel® Capital, along with other new investors Storm Ventures and Seraph Group as well as participation from Inventus Capital and other existing investors that include multiple IC industry C-suite executives. -
AccelerComm joins DARPA Toolbox initiative for advanced communications research projects
Aug. 05, 2021 - AccelerComm, the company supercharging 5G with physical layer IP which increases spectral efficiency and reduces latency, today announced an agreement with the U.S. Defense Advanced Research Projects Agency (DARPA). -
Imperas updates Free reference model riscvOVPsimPlus with new RISC-V P (SIMD/DSP) extension and Architectural Validation Test Suites
Jul. 19, 2021 - Imperas Software Ltd., the leader in RISC-V processor verification technology, announces the latest updates to riscvOVPsimPlus with support for the near ratified P extension and architectural validation test suites. -
Synopsys Strategic Partnership with Samsung Foundry Accelerates Access to Transformative 3nm GAA Technology
Jun. 28, 2021 - ynopsys, Inc. (Nasdaq: SNPS) today announced that the Synopsys Fusion Design Platform™ has enabled Samsung Foundry to achieve first-pass silicon success for an advanced, high-performance and multi-subsystem system-on-chip (SoC), validating the extended power, performance and area (PPA) benefits of ... -
CEA-Leti Collaborates with Siemens to Launch Process Design Kit that Supports Multiple Technologies, Simplifies Creation of Optical Circuits
Jun. 17, 2021 - CEA-Leti, a research institute at CEA, today announced that it has collaborated with Siemens Digital Industries Software to offer an updated process design kit (PDK) that enables photonic designers to select multiple methodologies, including layout centric, schematic driven and layout automation and ... -
sureCore & Intrinsic Announce Collaboration to Bring Novel RRAM Technology to Market
Jun. 11, 2021 - Intrinsic and sureCore are collaborating to deliver commercial memory solutions using sureCore’s patented memory architectures and Intrinsic’s novel RRAM cell. -
SmartDV Announces Support for ARINC Standards with Design and Verification IP
Jun. 03, 2021 - SmartDV™ Technologies, the leader in Design and Verification Intellectual Property (IP), today announced support of the ARINC standards with its Design and Verification IP. -
Cadence Collaborates with TSMC to Accelerate Mobile, AI and Hyperscale Computing Application Development on N3 and N4 Processes
May. 31, 2021 - Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it is expanding its collaboration with TSMC to accelerate mobile, AI and hyperscale computing application design using the integrated Cadence® digital flow and custom/analog tool suite on TSMC’s N3 and N4 process technologies. -
Synopsys Digital and Custom Design Platforms Certified for TSMC's Latest 3nm Process Technology
May. 26, 2021 - Synopsys today announced that TSMC has certified Synopsys' digital and custom design solutions based on TSMC's latest design-rule manual (DRM) and process design kits for its advanced 3-nanometer (nm) process technology. -
Synopsys Enables First-Pass Silicon Success for Early Adopters of Next-Generation Armv9 Architecture-based SoCs
May. 25, 2021 - Synopsys today announced multiple SoC tape-outs at early adopters of the next-generation Arm® Cortex®-X2, Cortex-A710, and Cortex-A510 CPUs based on Armv9, Arm Mali™-G710 GPUs and Arm DynamIQ Shared Unit-110 were achieved using Synopsys' portfolio of industry-leading solutions. -
Thalia's AMALIA Technology Analyzer de-risks Analog IP reuse for major IP houses and IC manufacturers
May. 18, 2021 - Thalia Design Automation, an IP reuse company and experts in the development and deployment of automation solutions for Analog & Mixed Signal IP Reuse, today announced further upgrades and enhancements to its Technology Analyzer. -
Synopsys and Arm Deliver Comprehensive Solutions to Increase Performance and Accelerate Time-to-Market for High-Performance Computing, Data Center and AI SoCs
Apr. 27, 2021 - Synopsys, Inc. (Nasdaq: SNPS) today announced that Arm and Synopsys have expanded their strategic collaboration to deliver optimized design, verification, silicon IP, software security, quality solutions and reference flows for Arm®-based system-on chips (SoCs), including the Arm Neoverse™ V1 and ... -
Defacto Technologies Announces SoC Compiler, v9
Apr. 26, 2021 - Defacto Technologies today announces v9 of their EDA software offering, SoC Compiler, replacing the STAR product name. -
sureCore Unveils New Low Voltage Register Files
Apr. 22, 2021 - SureCore Limited today unveiled a configurable register file compiler that offers industry-leading 60% dynamic power savings over current off-the-shelf solutions. -
Movellus Launches Maestro Intelligent Clock Network Platform for SoC Designs
Apr. 20, 2021 - Movellus, Inc. today announced its Maestro™ Intelligent Clock Network platform that intelligently orchestrates clock distribution in SoC designs. The platform provides critical clocking capabilities that address complex clock distribution requirements in modern SoCs, including AI applications in the ... -
Arteris IP Welcomes Back Veteran Laurent Moll as Chief Operating Officer
Apr. 14, 2021 - Arteris IP today announced it is proud to welcome Laurent Moll as Chief Operating Officer (COO). Laurent will be responsible for managing all aspects of engineering functions and operations at Arteris IP. -
Cadence Collaborates with Samsung Foundry to Accelerate Hyperscale Computing SoC Design for Process Nodes Down to 4nm
Apr. 09, 2021 - Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has optimized the Cadence® digital 20.1 full flow for Samsung Foundry’s advanced-process technologies down to 4nm. -
Arm's solution to the future needs of AI, security and specialized computing is v9
Mar. 31, 2021 - Armv9 is the first new Arm architecture in a decade, building on the success of Armv8 which today drives the best performance-per-watt everywhere computing happens.