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IP / SOC Products News

• CEVA Leads the Bluetooth 5 IP Wave (Wednesday Dec. 07, 2016)
  CEVA today announced the general release of its RivieraWaves Bluetooth 5 IP. With multiple enhancements including longer range, higher speed and extended support for connectionless services, Bluetooth 5 is a significant upgrade over prior Bluetooth standards, offering both improved features for existing use cases and breakout features to open up exciting new IoT applications for the smart environment.
  
  
• Smartlogic PCI Express DMA IP Cores now available for Intel FPGAs (Wednesday Dec. 07, 2016)
  Smartlogic today announced the immediate availability of its PCI Express® DMA IP cores for Intel FPGAs (formerly Altera). The proven DMA IP Cores for Xilinx FPGAs are now available for Intel FPGAs. Evaluations can be downloaded from the Smartlogic Website for the Arria V and Cyclone V Demoboards from Intel. Arria 10 Device support is expected to be available by January 2017.
  
  
• Arasan Announces MIPI C-PHY IP Core compliant to the latest C-PHY v1.1 Specifications (Thursday Dec. 01, 2016)
  Arasan today announced the immediate availability of its MIPI C-PHY IP Core fully compliant to the C-PHY specification Version 1.1 while also being compliant to the D-PHY 1.2 Specification. It supports the MIPI® Camera Serial Interface (CSI-2) and Display Serial Interface (DSI-2) protocols.
  
  
• QuickLogic Announces ArcticPro Ultra-Low Power Embedded FPGA IP Licensing Initiative (Thursday Dec. 01, 2016)
  QuickLogic Corporation (NASDAQ: QUIK), a developer of ultra-low power programmable sensor processing, display bridge and programmable logic solutions, today announced a strategic initiative to substantially broaden its market reach. The company will selectively license its proprietary ultra-low power programmable logic technology under the trade name ArcticPro™ eFPGA.
  
  
• Chipus Microelectronics launches a battery charger IP in a 0.18um BCD process (Thursday Dec. 01, 2016)
  The power management section of ICs for portable applications often requires low power consumption together with high voltage operation capability, which leads to big challenges for IC design with respect to power consumption and chip power dissipation.
  
  
• Silvaco Launches MIPI I3C Sensor Connectivity IP Family (Thursday Dec. 01, 2016)
  Silvaco, Inc. today announced an expanded collaboration with NXP® Semiconductors to bring MIPI I3C semiconductor intellectual property (IP) developed with NXP to market. As a result of this effort, a set of MIPI specification-compliant IP cores and support will be available to customers directly from Silvaco as part of its IPextreme IP portfolio.
  
  
• SiFive Launches Industry's First Open-Source RISC-V SoC (Tuesday Nov. 29, 2016)
  SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced the availability of its Freedom Everywhere 310 (FE310) system on a chip (SoC), the industry’s first commercially available SoC based on the free and open RISC-V instruction set architecture, along with the corresponding low-cost HiFive1 software development board.
  
  
• BaySand, Codasip, Codeplay and UltraSoC accelerate IoT development with "silicon-to-intelligence" RISC-V platform (Tuesday Nov. 29, 2016)
  BaySand, Codasip, Codeplay and UltraSoC today announced an integrated IoT development platform based on the RISC-V open processor instruction set architecture (ISA). The platform offers an open-standards-based solution that allows designers of systems-on-a-chip (SoCs) for IoT applications to get from concept to silicon with a high level of software integration in record time and substantially de-risks the entire product development process.
  
  
• Uniquify's LPDDR4 Super Combo IP Delivers 3200Mbps Performance in 28nm Low-Power Process Node (Tuesday Nov. 29, 2016)
  
  
  
• Mobiveil to Target Its Universal NOR Flash Controller (U-NFC) to Support Adesto Technologies New eXecute-in-Place Non-volatile Memory (NVM) EcoXiP Chip (Thursday Nov. 17, 2016)
  Mobiveil today announced it is working with Adesto Technologies, a leading provider of application-specific, ultra-low power non-volatile memory products to bring new, high-performance capabilities to customers designing eXecute-in-Place memory solutions.
  
  
• Enyx Premieres 25G TCP and UDP Offload Engines with Xilinx Virtex UltraScale+ 16nm FPGA on BittWare's XUPP3R PCIe Board (Wednesday Nov. 16, 2016)
  Enyx is pleased to announce the 25G version of its enterprise-class TCP/IP, UDP/IP and MAC Intellectual Property (IP) Cores for FPGAs and SoCs. This new edition is presented on the high-performance BittWare XUPP3R PCIe board, which features a VU9P FPGA from Xilinx’s new top-of-the-line 16nm UltraScale+ family.
  
  
• Microsemi is First FPGA Provider to Offer Open Architecture RISC-V IP Core and Comprehensive Software Solution for Embedded Designs (Wednesday Nov. 16, 2016)
  The company's RV32IM RISC-V core is available for Microsemi's IGLOO™2 FPGAs, SmartFusion™2 system-on-chip (SoC) FPGAs or RTG4™ FPGAs, with an Eclipse-based SoftConsole integrated development environment (IDE) hosted on a Linux platform and the Libero SoC Design Suite providing full design support.
  
  
• eMemory's NeoFuse IP Verified in TSMC 10nm FinFET Process (Wednesday Nov. 16, 2016)
  eMemory today announced the successful demonstration of its security-enhanced NeoFuse IP in TSMC’s 10nm FinFET process, along with IP design kits available to customers for product design-in.
  
  
• Brite Semiconductor Announces DDR4 IP Achieve 2400 Mbps on SMIC 40nm Process (Tuesday Nov. 15, 2016)
  Brite Semiconductor announced today, the YouPHY-DDR DDR4, DDR3/LPDDR3 subsystem had been silicon proven on SMIC 40nm low leakage process. According to the silicon data, the data rate of YouPHY-DDR reached to 2400Mbps in DDR4 protocol and 2133Mbps in DDR3/LPDDR3 with low power and small area successfully.
  
  
• Omnitek announce availability of IP for SDI I/O, SDI Gearbox and SDI Standards Conversion for Xilinx FPGAs (Monday Nov. 14, 2016)
  Omnitek - a well-established provider of video IP and design services vendor, is today announcing the release of SDI I/O Subsystem IP, SDI Gearbox IP and SDI Standards Conversion IP for Xilinx FPGA design.
  
  
• Creonic Delivers New CCSDS LDPC Forward Error Correction IP Core (Thursday Nov. 10, 2016)
  The new core provides block length and code rate flexibility, complementing the field-proven CCSDS LDPC (8160, 7136) encoder and decoder IP core. It extends Creonic’s broadest product portfolio of LDPC IP cores on the market.
  
  
• Codasip and BaySand Partnership Makes RISC-V Based ASICs an Ideal Choice for IoT Designs (Thursday Nov. 10, 2016)
  Codasip, a leading-edge processor IP provider, and BaySand, the leader in application configurable ASICs, announced that they are collaborating to make the Codix-Br series of RISC-V compliant processor cores available on BaySand’s new UltraShuttle service in 65nm and 40nm.
  
  
• Macnica Releases SLVS-EC Interface IP Core for FPGA (Tuesday Nov. 08, 2016)
  Macnica today expanded its Mpression IP portfolio releasing SLVS-EC interface IP core for ALTERA FPGA compliant with SLVS-EC interface technology newly incorporated into Sony CMOS Image Sensor.
  
  
• Digital Blocks Validates Existing I2C Slave Controller IP Core Family Compatibility with MIPI I3Cs (Monday Nov. 07, 2016)
  Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with Embedded Processor & Peripherals requirements, extends its leadership in I2C Controller Verilog IP Cores with validation of its existing I2C Slave Controller family with the emerging MIPI I3C (Improved Inter Integrated Circuit) standard.
  
  
• Digital Blocks Celebrates 19 Years of Offering 82xx Peripheral Replacements (Thursday Nov. 03, 2016)
  Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with Embedded Processor & Peripherals requirements, celebrates the 19 th year of its Intel® 82xx Peripherals Replacement program.
  
  
• DCD Presents the DBLCD32, a Fully Configurable, Universal LCD/TFT Display Controller (Wednesday Nov. 02, 2016)
  Digital Core Design has introduced the newest IP Core. The DBLCD32 IP Core is a fully configurable, universal LCD/TFT display controller, which supports a wide range of resolutions. Moreover, it enables both, horizontal and vertical parameters’ synchronization setup.
  
  
• ARM accelerates secure IoT from chip to cloud (Tuesday Oct. 25, 2016)
  ARM has released its most comprehensive product suite ever to deliver new levels of security, efficiency, low-power connectivity and device life cycle management for the Internet of Things (IoT). With new processors, radio technology, subsystems, end-to-end security and a cloud-based services platform, ARM is aiming to increase the rate at which IoT scales globally.
  
  
• SilabTech Announces Release of Trace Port PHY (HSSTP) for debug of Multiple Cores designs (Tuesday Oct. 25, 2016)
  SilabTech announced today the release of its High Speed Serial Trace Port (HSSTP) PHY. This IP Core is silicon proven on TSMC 28HPC and was successfully delivered to a Tier-1 global semiconductor company.
  
  
• Arteris Adds Support for ARM AMBA 5 AHB5 Protocol (Tuesday Oct. 25, 2016)
  Arteris today announced that it has implemented ARM® AMBA® 5 Advanced High-Performance Bus 5 (AHB5) protocol support in its FlexNoC Interconnect IP and Ncore Interconnect IP products.
  
  
• Intrinsic-ID collaborates with Wind River to offer robust PUF-Based security library integrated with VxWorks (Tuesday Oct. 25, 2016)
  Intrinsic-ID announces the availability of SRAM PUF (Physical Unclonable Function) tightly integrated with Wind River® VxWorks® real-time operating system as a kernel library. The solution adds critical key management services for protection and provisioning of cryptographic keys without the need for added secure elements or other dedicated hardware
  
  
• Allegro DVT Introduces New Lightweight Multi-Format Video Encoder IP (Thursday Oct. 20, 2016)
  Allegro DVT today announced the availability of a new lightweight version of its multi-format encoder HW IP targeted at consumer applications with requirements for high quality video compression.
  
  
• Faraday Unveils Uranus SoC Development Platform for Ultra-Low-Power IoT (Wednesday Oct. 19, 2016)
  Faraday Technology today introduced the Uranus™ 55nm ultra-low-power SoC development platform for IoT applications. As the latest member of its MCU-based SoC development platform series, Uranus features Faraday’s PowerSlash™ IP, USB 2.0 interface, 12-bit 8-channel ADC, 10-bit DAC, embedded flash memory, and comprehensive SDK support, demonstrating the next level of IoT chip power-saving.
  
  
• CAST Expands Streaming Video IP Line with Motion JPEG Subsystem (Wednesday Oct. 19, 2016)
  A new IP subsystem developed by semiconductor intellectual property provider CAST, Inc. makes it easy for system designers to exploit the benefits of Motion JPEG for video streaming in many Internet of Things (IoT) and other applications.
  
  
• Newracom Announces Availability of Ultra-Low Power ARM Core Based Wi-Fi 802.11 b/g/n MAC/PHY/Subsystem and RFIC IP for Internet of Things Applications (Monday Oct. 17, 2016)
  Newracom, Inc., a leading developer and licensor in wireless intellectual property of cutting-edge Wi-Fi technology, today announced the availability of NRC6181, a proven ultra-low power ARM Core based IEEE 802.11b/g/n MAC/PHY/full Wi-Fi subsystem and RFIC IP especially designed for Internet of Things (IoT) applications.
  
  
• DUSB2-ULPI, USB 2.0 device controller with ULPI interface (Monday Oct. 17, 2016)
  Digital Core Design has introduced the newest IP Core. The DUSB2-ULPI is a hardware implementation of a full/high-speed peripheral controller that interfaces to an ULPI bus transceiver. It contains USB PID and address recognition logic, state machines to handle USB packets and transactions, endpoints number recognition logic and endpoints FIFO control logic.