Jun. 30, 2022 - Breker Verification Systems, the leading provider of advanced test content synthesis solutions, including RISC-V Cache Coherency and other SoC integration Verification Intellectual Property (VIP) in the “TrekApps” family, today joined RISC-V International (RVI) as a strategic member.

Jun. 17, 2021 - Advantest Corporation is pilot testing a next-generation solution for performing both high-speed scan testing and software-driven functional device testing on the V93000 platform by leveraging the existing high-speed serial I/O interfaces on advanced integrated circuits (ICs).

Oct. 26, 2020 - Synopsys today announced that in collaboration with Samsung Foundry, more than 30 new interoperable process design kits (iPDKs) have been jointly developed, validated and support the Synopsys Custom Design Platform.

Jul. 05, 2016 - PLDA Training leverages PLDA’s industry expertise in IP Connectivity design to share best-in-class techniques on their customers’ own schedules to cost-effectively optimize their projects

May. 02, 2008 - Cadence Design Systems, Inc. today announced the immediate availability of multiple, silicon-ready RTL to GDSII implementation flows based on the Cadence® Encounter® digital IC design platform, for the ARM® Cortex™-A9 processor.

Dec. 05, 2007 - Cadence Design Systems, Inc. and ARM today announced the availability of two new implementation reference methodologies jointly developed by the companies, one for the ARM11™ MPCore™ multicore processor and the other for low-power implementation of the ARM1176JZF-S™ processor, which incorporates ...

May. 21, 2007 - With CHAINarchitect, chip architects can easily explore new interconnect topologies and perform ''what if'' analyses to optimize on-chip communications (bandwidth and latency) between IP cores along with overall system characteristics such as power, die area, system-level performance and others.

Apr. 02, 2007 - CoWare announced a new release of the CoWare Virtual Platform Product Family that addresses the challenges associated with go-to-market strategies and software development for multicore, platform-based designs.

Jul. 24, 2006 - ARM Enhances Reference Methodologies With Library Views And Pre-Compiled Rams

Oct. 24, 2005 - HDL, Design Team, and Enterprise Families offer 'Plan-to-Closure' Verification Solutions Tailored for Unique Project Needs

Jul. 29, 2005 - Of the 141 respondents to the online survey, which was conducted in late May and early June, more than 98 percent answered that they either agree or strongly agree that ESL methodologies can strongly improve productivity

Jan. 03, 2005 - CoWare Forges Relationships with Premier Universities in India to Accelerate Research and Development in ESL Tools and Methodologies

May. 28, 2002 - ARM, Synopsys And TSMC Address Industry Need For Proven SoC Methodologies

Dec. 15, 1999 - Cadence Delivers Robust Portfolio of System-on-a-Chip Methodologies

May. 08, 2000 - Co-Design Automation Launches Innovative Product Line to Reshape System Design Methodologies

Jun. 09, 2000 - De Man calls for new breed of engineer, tools and methodologies

Jun. 11, 2001 - Altera Accelerates SOPC Development With New Quartus II Design Methodologies

May. 01, 2025 - Weebit Nano Ltd (ASX: WBT, Weebit or Company) provides this activity report for the quarter ended 31 March 2025 (Q3 FY25), along with the Company’s Appendix 4C cash flow report.

Apr. 14, 2025 - Defacto Technologies, a key player in EDA solutions for SoC design, announces the update of its SoC Compiler software to automate front-end SoC integration flows for complex RISC-V architectures.

Mar. 31, 2025 - SEALSQ today announces a strategic collaboration with IC’ALPS, a premier ASIC design house specializing in custom integrated circuits ready for IATF16949 standard, mastering Functional Safety for ISO 26262 with solutions tailored to meet the required ASIL levels.

Mar. 31, 2025 - vant Technology, a leading provider of EDA tools and IP solutions in Asia, and COSEDA Technologies, a pioneering provider of system-level software solutions, have announced a strategic partnership. This collaboration aims to enhance the capabilities of both companies in delivering advanced system-level ...

Mar. 24, 2025 - IEEE Standard 1801, also known as Unified Power Format (UPF), is a standardized specification language designed to define the low-power architecture of an ASIC. It streamlines integration throughout the entire verification and implementation process.

Mar. 11, 2025 - Joint Solution to Drive Adoption of "Shift-Left" Software Development Methodologies with the Integration of Synopsys' Electronics Digital Twin Capabilities and Vector's Software Factory

Mar. 10, 2025 - Synopsys Inc. today announced the availability of Synopsys Virtualizer™ Native Execution on Arm®-based hardware, transforming software development for edge devices by substantially accelerating virtual prototype execution and deployment.

Feb. 25, 2025 - SureCore, the ultra-low power memory specialist, has enabled KU Leuven, Belgium’s renowned research university, to develop a neural processing accelerator chip for AI applications that boasts dynamic power savings in excess of 40%, compared to solutions using the industry standard SRAM.

Jan. 06, 2025 - Ansys and Synopsys today announced that Ansys has entered into a definitive agreement for the sale of its PowerArtist™ business to Keysight Technologies, Inc., a global leader in design and simulation software for semiconductors, electronics and high-performance systems.

Dec. 17, 2024 - Further to sureCore’s recent announcement about its launch of a range of cryogenic IP following the successful evaluation of test chips in both 180 nm and 22nm process nodes, the company has revealed that it has teamed with packaging experts, Sarcina, who designed a custom package specifically for ...

Dec. 06, 2024 - Qualitas Semiconductor announced that its MIPI D-PHY IP has been integrated into an artificial intelligence (AI) and vision processing microprocessor (MPU) developed by Renesas Electronics. The relationship between Qualitas and Renesas began in 2021, when they started collaborating on multiple successful ...

Nov. 26, 2024 - sureCore, the memory specialist, has announced that it is now licensing its CryoMem™ suite of Memory IP that is designed for use at the extremely low temperatures required for Quantum Computing (QC) applications.

Nov. 22, 2024 - Sondrel, a leading provider of ultra-complex custom chips, has announced that it has started front end, RTL design and verification work on a high-performance computing (HPC) chip project for a major new customer.

Nov. 11, 2024 - Siemens Digital Industries Software announced today the Innexis product suite, a complement to its industry leading Veloce™ hardware-assisted verification and validation system.

Aug. 13, 2024 - OPENEDGES Technology, Inc. (OPENEDGES), the leading provider of memory subsystem intellectual property (IP), today announced the launch of the Universal Chiplet Interconnect Express (UCIe) Controller IP, named OUC.

Jul. 01, 2024 - Today marks a new milestone in the growth of Intel Foundry’s design ecosystem as key partners Ansys, Cadence, Siemens, and Synopsys have announced the availability of reference flows for Intel’s embedded multi-die interconnect bridge (EMIB) advanced packaging technology.

Jun. 25, 2024 - Siemens Digital Industries Software announced today Innovator3D IC™, new software that delivers a fast, predictable path for the planning and heterogeneous integration of ASICs and chiplets using the latest and most advanced semiconductor packaging 2.5D & 3D technologies and substrates in the world. ...

Jun. 13, 2024 - Siemens Digital Industries Software today announced that, in collaboration with Samsung Foundry, they have developed compelling new capabilities for the manufacture of multi-die packaged designs at advanced nodes and achieved a host of new product certifications for many of Siemens’ industry-leading ...

Jun. 06, 2024 - Designed to be used with Siemens’ Catapult™ software for high-level synthesis and verification, Catapult formal tools uniquely bring known and trusted formal verification methods from the RTL world to high-level design.

Jun. 04, 2024 - One of the big challenges with data centres is amount of power that they consume. This is being further exacerbated by the increasing use of AI in the form of Large Language Models.

May. 02, 2024 - Along with Microchip’s Mi-V ecosystem, new device family helps system designers to lower power, size and weight and speed time to market

May. 01, 2024 - Rapid Silicon, a provider of AI and intelligent edge-focused FPGAs based on open-source technology, today announced its release of the Rapid eFPGA Configurator, a revolutionary tool empowering System-on-Chip (SoC) designers to customize their own embedded Field-Programmable Gate Arrays (eFPGA) with ...

Apr. 24, 2024 - Today at the TSMC 2024 North America Technology Symposium, Siemens Digital Industries Software announced that ongoing collaboration with longtime partner TSMC has successfully achieved multiple new product certifications and project milestones for TSMC’s newest and most advanced processes.