MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm, 12nm, N5)
1603 Results (1 - 40) |
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Breker Verification Systems Joins RISC-V International as a Strategic Member to Drive Cache Coherency and SoC Integration Verification Methodologies
Jun. 30, 2022 - Breker Verification Systems, the leading provider of advanced test content synthesis solutions, including RISC-V Cache Coherency and other SoC integration Verification Intellectual Property (VIP) in the “TrekApps” family, today joined RISC-V International (RVI) as a strategic member. -
Advantest Developing Innovative Methodologies for High-Speed Scan and Software-Based Functional Testing
Jun. 17, 2021 - Advantest Corporation is pilot testing a next-generation solution for performing both high-speed scan testing and software-driven functional device testing on the V93000 platform by leveraging the existing high-speed serial I/O interfaces on advanced integrated circuits (ICs). -
Synopsys and Samsung Foundry Collaboration Delivers Portfolio of Optimized iPDKs and Methodologies for Advanced Custom Design
Oct. 26, 2020 - Synopsys today announced that in collaboration with Samsung Foundry, more than 30 new interoperable process design kits (iPDKs) have been jointly developed, validated and support the Synopsys Custom Design Platform. -
PLDA Announces its Newest Expansion with the Launch of PLDA Training, a Full Training Program that Provides Easy-to-access Design Methodologies for SoC, Board and Low-level Software Designs
Jul. 05, 2016 - PLDA Training leverages PLDA’s industry expertise in IP Connectivity design to share best-in-class techniques on their customers’ own schedules to cost-effectively optimize their projects -
Cadence Delivers Silicon-Ready Reference Methodologies for ARM Cortex-A9 Processor
May. 02, 2008 - Cadence Design Systems, Inc. today announced the immediate availability of multiple, silicon-ready RTL to GDSII implementation flows based on the Cadence® Encounter® digital IC design platform, for the ARM® Cortex™-A9 processor. -
Cadence and ARM Deliver Reference Methodologies for Multicore and Low-Power Devices
Dec. 05, 2007 - Cadence Design Systems, Inc. and ARM today announced the availability of two new implementation reference methodologies jointly developed by the companies, one for the ARM11™ MPCore™ multicore processor and the other for low-power implementation of the ARM1176JZF-S™ processor, which incorporates ... -
Silistix CHAINarchitect Bridges Gap Between Conventional and Leading-Edge Interconnect Methodologies
May. 21, 2007 - With CHAINarchitect, chip architects can easily explore new interconnect topologies and perform ''what if'' analyses to optimize on-chip communications (bandwidth and latency) between IP cores along with overall system characteristics such as power, die area, system-level performance and others. -
CoWare Virtual Platforms Transform Enterprise Go-to-Market Strategies and Software Development Methodologies
Apr. 02, 2007 - CoWare announced a new release of the CoWare Virtual Platform Product Family that addresses the challenges associated with go-to-market strategies and software development for multicore, platform-based designs. -
ARM Enhances Reference Methodologies With Library Views And Pre-Compiled Rams
Jul. 24, 2006 - ARM Enhances Reference Methodologies With Library Views And Pre-Compiled Rams -
Cadence Advances Segmentation Strategy with 3 Tiers of Verification Products and Methodologies
Oct. 24, 2005 - HDL, Design Team, and Enterprise Families offer 'Plan-to-Closure' Verification Solutions Tailored for Unique Project Needs -
Survey says: ESL methodologies can improve productivity
Jul. 29, 2005 - Of the 141 respondents to the online survey, which was conducted in late May and early June, more than 98 percent answered that they either agree or strongly agree that ESL methodologies can strongly improve productivity -
CoWare Forges Relationships with Premier Universities in India to Accelerate Research and Development in ESL Tools and Methodologies
Jan. 03, 2005 - CoWare Forges Relationships with Premier Universities in India to Accelerate Research and Development in ESL Tools and Methodologies -
ARM, Synopsys And TSMC Address Industry Need For Proven SoC Methodologies
May. 28, 2002 - ARM, Synopsys And TSMC Address Industry Need For Proven SoC Methodologies -
Cadence Delivers Robust Portfolio of System-on-a-Chip Methodologies
Dec. 15, 1999 - Cadence Delivers Robust Portfolio of System-on-a-Chip Methodologies -
Co-Design Automation Launches Innovative Product Line to Reshape System Design Methodologies
May. 08, 2000 - Co-Design Automation Launches Innovative Product Line to Reshape System Design Methodologies -
De Man calls for new breed of engineer, tools and methodologies
Jun. 09, 2000 - De Man calls for new breed of engineer, tools and methodologies -
Altera Accelerates SOPC Development With New Quartus II Design Methodologies
Jun. 11, 2001 - Altera Accelerates SOPC Development With New Quartus II Design Methodologies -
Radiation-Tolerant PolarFire® SoC FPGAs Offer Low Power, Zero Configuration Upsets, RISC-V Architecture for Space Applications
May. 02, 2024 - Along with Microchip’s Mi-V ecosystem, new device family helps system designers to lower power, size and weight and speed time to market -
Rapid Silicon Introduces Revolutionary Rapid eFPGA Configurator for Hassle Free Embedded FPGA Evaluation
May. 01, 2024 - Rapid Silicon, a provider of AI and intelligent edge-focused FPGAs based on open-source technology, today announced its release of the Rapid eFPGA Configurator, a revolutionary tool empowering System-on-Chip (SoC) designers to customize their own embedded Field-Programmable Gate Arrays (eFPGA) with ... -
Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
Apr. 24, 2024 - Today at the TSMC 2024 North America Technology Symposium, Siemens Digital Industries Software announced that ongoing collaboration with longtime partner TSMC has successfully achieved multiple new product certifications and project milestones for TSMC’s newest and most advanced processes. -
sureCore announces low power memory compiler for 16nm FinFET
Apr. 04, 2024 - sureCore, the low power embedded memory specialist, has announced the availability of its PowerMiser, ultra-low, dynamic power memory compiler in 16nm. This will enable developers to more easily hit their challenging power budgets and successfully exploit the capabilities of these mature FinFET processes. ... -
SmartSoC Solutions Joins TSMC Design Center Alliance to Boost Semiconductor Innovation in India
Mar. 27, 2024 - SmartSoC Solutions, a leading Indian semiconductor design services company founded in 2016, is excited to announce its membership in the Design Center Alliance (DCA) of TSMC’s Open Innovation Platform® (OIP). -
Arteris Expands Automotive Solutions for Armv9 Architecture CPUs
Mar. 13, 2024 - Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced the first deliverables of its ongoing partnership with Arm to speed up automotive electronics innovation based on the latest generation of Arm® Automotive Enhanced (AE) technologies. ... -
OPENEDGES and SEMIFIVE Partnership Reinforce the SoC Platform
Mar. 11, 2024 - OPENEDGES Technology proudly unveils a strategic partnership with SEMIFIVE to establish a user-friendly SoC ecosystem, integrating silicon-proven IPs and optimized design methodologies to achieve lower cost, reduced risk, and faster turnaround time. -
sureCore announces ultra-low power memory IP for AI applications
Mar. 07, 2024 - SureCore has revisited its PowerMiser IP and further optimised it to drive down dynamic power further as well as exploiting the power efficiencies of FinFET technology. This has delivered a memory technology that minimises thermal impact whilst delivering the demanding performance profile needed by ... -
Synopsys and Intel Foundry Accelerate Advanced Chip Designs with Synopsys IP and Certified EDA Flows for Intel 18A Process
Feb. 21, 2024 - Synopsys, Inc. (Nasdaq: SNPS) today announced its AI-driven digital and analog design flows are certified by Intel Foundry for the Intel 18A process. -
Biden-Harris Administration Announces Over $5 Billion from the CHIPS and Science Act for Research, Development, and Workforce
Feb. 12, 2024 - Today, the Biden-Harris Administration announced it expects to invest over $5 billion in semiconductor-related research, development, and workforce needs, including in the National Semiconductor Technology Center (NSTC), to advance President Biden’s goals of driving R&D in the United States. -
Socionext to Showcase Leading-Edge Technologies at CES 2024, Featuring Custom SoC Solutions, Low Power Sensors, Smart Display Controller, and Advanced Image Processor
Jan. 05, 2024 - Socionext, an innovative custom SoCs provider with a distinctive "Solution SoC" business model, will showcase its leading-edge technologies and products at CES 2024, Jan. 9-12. -
Faraday Collaborates in Arm Total Design to Provide Arm Neoverse CSS-based Design Services
Jan. 04, 2024 - By leveraging Arm Neoverse™ Compute Subsystems (CSS), Faraday is poised to deliver cutting-edge cloud, high-performance computing (HPC), and AI chips with unparalleled performance and innovation. -
Synopsys Acquires RISC-V Processor Simulation Tools Firm
Dec. 21, 2023 - Synopsys appears to be on a mission to build out its total RISC-V ecosystem offerings, having quietly acquired Imperas Software last week. -
Agile Analog partners with sureCore on CryoCMOS Innovate UK project
Dec. 05, 2023 - Agile Analog is collaborating with sureCore to implement a cryogenic control ASIC on the GlobalFoundries 22FDX process, as part of the Innovate UK funded project: “Development Of Cryogenic CMOS To Enable The Next Generation Of Scalable Quantum Computers.” -
EMA Design Automation to Spin-Off IP & Services Group to Enable Digital Transformation for the Entire CAD Industry
Dec. 04, 2023 - EMA Design Automation®, Inc., the world's premier EDA VAR, is spinning off their IP, content, and services group as a new company named Accelerated Designs, LLC with a focus on CAD agnostic solutions. Accelerated Designs will expand on the extensive design and methodology expertise EMA has gained ... -
Untether AI Joins UCIe Consortium to Drive Chiplet Technology and Energy-Centric AI Acceleration
Nov. 29, 2023 - Untether AI®, the leader in energy-centric AI inference acceleration, today announced that it has joined Universal Chiplet Interconnect Express™ (UCIe™) Consortium, the industry organization that has developed an open specification that defines the interconnect between chiplets within a package. ... -
Siemens works with Arm and AWS to bring PAVE360 to the cloud and unlocks next generation automotive innovation
Nov. 14, 2023 - Siemens Digital Industries Software today announced that its PAVE360-based solution for automotive digital twin is now available on AWS. Expanding on the strong partnership between Siemens and AWS, PAVE360 helps foster innovation in the automotive industry through hardware and software parallel development, ... -
sureCore and Intrinsic announce collaboration to accelerate time to market for innovative ReRAM technology
Nov. 01, 2023 - SureCore and Intrinsic have announced a collaborative relationship to accelerate time to market for Intrinsic’s innovative, Resistive Random-access Memory (ReRAM) technology. -
Semiconductor startup, Enosemi, launches with a committed commercial license to key silicon photonics design IP created by Luminous Computing
Oct. 13, 2023 - Enosemi emerges from stealth mode today as a new fabless semiconductor startup focused on design enablement and design IP for silicon photonics. -
ELES and proteanTecs Partner to Enhance Reliability Testing with Deep Data Analytics
Oct. 05, 2023 - The collaboration combines proteanTecs’ Health and Performance Monitoring solutions with ELES’ Design for Reliability methodology and advanced reliability test platforms. -
Cadence Custom/Analog Design Migration Flow Accelerates Adoption of TSMC Advanced Process Technologies
Sep. 26, 2023 - Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the expansion of its node-to-node design migration flow based on the Cadence® Virtuoso® Studio, which is compatible with all TSMC advanced nodes, including the latest N3E and N2 process technologies. -
Blue Pearl Adds Design Verification and Methodology Services to its Product Portfolio
Sep. 11, 2023 - Blue Pearl Software Inc., today announced that it has added design verification and methodology services to its product offering. -
Synopsys Extends Synopsys.ai EDA Suite with Industry's First Full-Stack Big Data Analytics Solution
Sep. 07, 2023 - The Synopsys EDA Data Analytics solution is the first of its kind in the semiconductor industry to provide AI-driven insight and optimization to drive improvements across exploration, design, manufacturing, and testing processes.