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Oct. 29, 2012 -
CEVA today announced that Inomize, the largest Israeli ASIC solutions firm, has joined the CEVAnet Partner Program, officially becoming an Approved Design Center for CEVA's customers.
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Oct. 18, 2012 -
Mentor Graphics today announced new formal-based technologies in the Questa® Verification Platform that provide mainstream users with the ability to more easily perform exhaustive formal verification analysis.
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Oct. 09, 2012 -
TSMC announced today that the readiness of 20nm and CoWoS™ design support within the Open Innovation Platform® (OIP) is demonstrated by the delivery of two foundry-first reference flows supporting 20nm and CoWoS™ (Chip on Wafer on Subsrate) technologies.
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Oct. 01, 2012 -
Memoir Systems today announced the availability of the second offering of its revolutionary commercial products: Renaissance™4X. Renaissance 4X increases the memory performance of existing embedded memory macros by delivering up to a 4X increase in memory operations per second (MOPS).
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Sep. 05, 2012 -
Synopsys today announced the 100th design win of its DesignWare IP optimized for 28-nm. The silicon-proven 28-nm portfolio consists of widely-used IP including PHYs for USB, PCI Express, SATA, HDMI, DDR, MIPI, as well as data converters, audio codecs, embedded memories and logic libraries, with tens ...
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Aug. 28, 2012 -
ARM and Synopsys have signed a multi-year agreement that expands Synopsys' access to a broad range of ARM IP. The two companies will broaden their collaboration to enable SoC designers to optimize the power and performance of ARM technology-based SoCs with Synopsys Galaxy Implementation Platform and ...
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Aug. 22, 2012 -
Sonics today announced that Intel has licensed key IP components from Sonics portfolio of system IP for use in its SoC platforms -- which incorporate the Intel® Atom™ processor. Intel will work with Sonics to rapidly, intelligently and securely integrate a wide array of third party IP onto its SoC ...
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Aug. 10, 2012 -
Novocell Semiconductor has responded to the demands of their growing number of military, aerospace, and automotive industry customers, announcing today that their Smartbit™-based antifuse OTP memory designs have completed the rigorous exposure to long term high temperature exposure required for Military ...
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Aug. 08, 2012 -
Synopsys today announced the launch of VIP-Central.org, the first industry-wide, technical community site focused on system-on-chip (SoC) verification engineers and users of verification IP (VIP).
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Jul. 26, 2012 -
Vivado Design Suite 2012.2 delivers a highly Integrated Design Environment (IDE) with a completely new generation of system-to-IC tools that include High-Level Synthesis, RTL Synthesis with the industry's best SystemVerilog support, revolutionary analytical place and route, and an advanced SDC-based ...
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Jul. 11, 2012 -
Cadence today announced powerful new capabilities in its PCI Express® Verification IP (PCIe® VIP) which result in more in-depth verification of the most current PCI Express specification at both the block and system-on-chip (SoC) levels.
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Jul. 02, 2012 -
S2C announces that TAKUMI, a Japan-based advanced Graphics IP provider, has implemented a series of Graphics IP cores on S2C’s rapid FPGA-based prototyping systems including GS3000 and GSV3000 cores.
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Jun. 26, 2012 -
Synopsys and SMIC today announced availability of version 5.0 of their 40-nanometer (nm) RTL-to-GDSII reference design flow.
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Jun. 01, 2012 -
GLOBALFOUNDRIES plans to demonstrate an enhanced silicon-validated design flow for its 28nm Super Low Power (SLP) technology with Gate First High-k Metal Gate (HKMG). In addition, the company will reveal jointly developed design flows with its EDA partners in certifying both analog and digital "double ...
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Jun. 01, 2012 -
S2C today announced that it has added ARM1176 and ARM926 GUC test chip modules to the comprehensive family of Prototype Ready™ accessories used to create FPGA-based prototypes and to interface FPGA-based prototype boards to the user’s target operating environment.
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May. 31, 2012 -
Cadence today announced that it has contributed to STMicroelectronics having taped out a 20-nanometer test chip, incorporating custom analog and digital methodologies to enable mixed-signal SoC design at this advanced process node.
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May. 22, 2012 -
NanGate today announced the release of its V5 Library Creator Platform for advanced process node SoC design, including support for 20/22nm process technology.
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May. 15, 2012 -
Access to the latest Vivante IP cores, give HiSilicon an innovative technology platform based on the latest 3D, CGPU (Composition GPU) and GPGPU APIs. The latest agreement enables HiSilicon to deliver the highest graphics performance in products spanning its entire portfolio.
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May. 15, 2012 -
ICScape Inc. today announced that after enabling over 100 successful customer tapeouts, it is now ready to market its solutions worldwide. The expansion is driven by US$28 million in financial backing the company received in 2011, mostly from China Electronics Corporation (CEC), China’s largest electronics ...
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May. 14, 2012 -
Sigrity today introduced XcitePI IO Interconnect Model Extraction as part of the company’s comprehensive suite of high-speed analysis software products. This breakthrough technology generates precise chip IO power/ground and signal interconnect models for accurate system-level analysis of high-speed ...
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Apr. 30, 2012 -
Cadence today announced TripleCheck IP Validator, a new addition to the Cadence Verification IP (VIP) Catalog that simplifies and accelerates compliance testing of interface design IP. The expanding Cadence VIP Catalog is helping leading system and semiconductor companies quickly and thoroughly verify ...
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Apr. 18, 2012 -
Soitec announced today its fully depleted (FD) product roadmap comprising two products designed for both planar and three-dimensional (FinFET) approaches to building transistors.
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Apr. 06, 2012 -
Netronome today announced an extension of its strategic relationship with Intel Corp. in which Netronome’s next-‐ generation flow processors will be manufactured on Intel’s leading 22nm process. Netronome will offer the world’s first flow processors based on Intel’s market-‐defining ...
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Mar. 27, 2012 -
Xilinx today announced availability of the Virtex®-6Q Field FPGA family, a high performance defense-grade, programmable solution for major defense applications. NSA has reviewed the Xilinx Security Monitor (SECMON) IP core and found that it provides a level of Anti-Tamper (AT) protection, which will ...
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Mar. 26, 2012 -
Synopsys today announced the availability of the DesignWare® SoundWave Audio Subsystem, a complete, integrated hardware and software audio IP subsystem for system-on-chip (SoC) designs. Synopsys' SoundWave Audio Subsystem is fully configurable and supports 2.0 to 7.1 audio streams with 24-bit precision ...
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Mar. 22, 2012 -
Synopsys today announced availability of verification IP (VIP) for Non-Volatile Memory Express (NVMe), an emerging storage protocol for connecting solid state drives (SSDs) directly to the PCI Express® interface.
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Mar. 14, 2012 -
The IC research program will provide a world-class environment for research projects between the three parties. It will serve as a platform for cooperation, strengthening technology development and academic exchange while aligning with the university's educational tradition of "combining theory and ...
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Mar. 05, 2012 -
Atrenta today announced that 10 intellectual property (IP) providers have qualified their soft IP for inclusion in the TSMC 9000 IP library using the Atrenta IP Handoff Kit.
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Mar. 05, 2012 -
SpringSoft today unveiled the third generation of its market-leading debug automation software. The new Verdi3 product is an open platform that introduces user personalization, customization, and enhanced interoperability to create a powerful debug cockpit, and is built on a next-generation software ...
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Feb. 27, 2012 -
Synopsys today unveiled its Discovery™ Verification IP (VIP) family based on the new VIPER architecture. Written entirely in SystemVerilog with native support for the UVM, VMM and OVM methodologies, Discovery VIP provides inherent performance, ease-of-use and extensibility to speed and simplify verification ...
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Feb. 27, 2012 -
Brite Semiconductor, SMIC and ARM today jointly announced the first tape out of a dual-core ARM® Cortex™-A9 MPCore™ test chip using SMIC's 40nm low leakage process technology.
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Feb. 15, 2012 -
Renesas Mobile today announced the availability of the MP5232, the first single-chip, high-performance, scalable smartphone platform optimised to address the US$150-300 range device market.
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Feb. 08, 2012 -
Methodics today announced that its suite of SoC development tools supports the latest release of the Subversion® version control system. The integration provides development teams with an efficient way to manage the hardware and software aspects of large, complex ICs.
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Feb. 06, 2012 -
Working closely together, Cadence and Samsung Foundry have developed "in-design" and signoff DFM flows to tackle physical signoff and electrical variability optimization for 32-, 28- and 20-nanometer SoC designs.
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Jan. 24, 2012 -
Why must a programmer care for the hardware architecture when writing embedded applications for multi-core? Today at HiPEAC 2012, Prof. Nikolaos Voros explains how the ALMA Consortium intends to turn the 'MUST' into a 'MAY'. The ALMA Consortium proposes a tool chain that hides the complexity of hardware ...
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Jan. 18, 2012 -
Xilinx today released ISE® Design Suite 13.4, which provides public access to the MicroBlaze™ Micro Controller System (MCS), new RX Margin Analysis and debug capabilities for the 28nm 7 Series FPGAs and partial reconfiguration support for the Artix™-7 family and Virtex®-7 XT devices.
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Jan. 10, 2012 -
SpringSoft and Hua Hong NEC today announced that Hua Hong NEC has deployed the Laker™ custom IC design solutions for process design kit (PDK ) development and integrated the award-winning Verdi™ Automated Debug System into the foundry’s verification reference flow.
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Jan. 10, 2012 -
Aldec, Inc., in collaboration with SynthWorks Design Inc., today announces the availability of Open Source - VHDL Verification Methodology (OS-VVM™), underscoring the partnership’s commitment to provide continued support to the VHDL design community.
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Jan. 04, 2012 -
EnSilica has opened a new design centre in India (Bangalore), to complement its existing design facilities in the UK. The new design centre will be a centre of excellence for the advanced verification of complex semiconductor products and IP.
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Jan. 04, 2012 -
TVS today announces the opening of new offices in Germany to better provide hardware verification and software testing services to the electronics industry in the European Schengen visa region.