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Packetcraft Delivers Bluetooth Software Enabling Channel Sounding to Early Access Licensees

Alphawave Semi announced today a refocussing of the Board of Directors after reaching the three-year milestone since the Company's IPO
Synopsys and Samsung Electronics Collaborate to Achieve First Production Tapeout of Flagship Mobile CPU with Leading Performance on Samsung Foundry's GAA Process
Worldwide Silicon Wafer Shipments Dip 5% in Q1 2024, SEMI Reports
GOWIN's progress in global automotive market gathers momentum with award of ISO 26262 certification for its FPGA design environment
PCI-SIG® Announces CopprLink™ Cable Specifications for PCIe® 5.0 and 6.0 Technology
Radiation-Tolerant PolarFire® SoC FPGAs Offer Low Power, Zero Configuration Upsets, RISC-V Architecture for Space Applications

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Today on Design-Reuse.com

			
			Analysis
			
			TSMC's A16 Process Moves Goalposts in Tech-Leadership Game
			
Taiwan Semiconductor Manufacturing Co. (TSMC) has changed the tech leadership game with the announcement of its latest A16 chipmaking process, which analysts ...
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			Analysis
			
			Altera in negotiation on private equity partner
			
Intel expects to see a partnership with private equity on the spin out of its Altera FPGA business later this year.

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			Analysis
			
			Arm China's ex-CEO sets up RISC-V company
			
Allen Wu, the sacked CEO of Arm China who wouldn’t leave, has set up a RISC-V company called Zhongzhi Chip, according to TrendForce, citing WeChat.

 ...
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			Analysis
			
			TSMC plans 1.6nm process for 2026
			
TSMC is planning a 1.6nm process, called A16, for production in 2026 alongside a wafer-scale chiplet substrate and an automotive chiplet process.

			Read
			
			By default
			
			Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety ...
			
The partnership aims to bolster the development and technical support of ISO 26262, the international standard for the functional safety of automotive ...
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			IP / SoC
			
			M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
			
 M31 Technology Corporation (M31), a leading global provider of silicon intellectual property (IP), announced that the M31 MIPI C/D-PHY Combo IP has obtained ...
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Industry Expert Blogs

What You Need to Know About Gate-All-Around Designs

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Andrew Appleby, Synopsys

Ceva's Experts blog
Navot Goren, Ceva

USB4 Version 2.0 - Low Power with Gen4 Link

Celebrating World Intellectual Property Day

Cadence Blog
Neelabh Krishnan, Cadence

Cadence Blog
Arif Khan, Cadence

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IP SoC Silicon Valley 24

April 25^th, 2024

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IP SoC Conference 23

December 4^th - 5^th, 2023

GDDR7 Controller IP

• Supports 160 GB/s throughput
• Optimized for high efficiency, low latency
• For AI/ML, graphics and HPC applications
• Available standalone or integrated with your choice of PHY

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3nm 24Gbps UCIe Die-Die Connectivity solution
• Very low power, low latency, configurable controller • Enables I/O, Memory, and Compute Chiplets • 3nm silicon verified
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MIPI C/D PHY Combo IP – AI Enabled System
• Enable Artificial Intelligence (AI) applications • Comprehensive audio-visual subsystem • Optimizes Space utilization • Simplifies the design complexity
Learn More