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Monday, September 21, 2026

• Altera and Rutronik partner to broaden FPGA availability across Europe
• TDK-Micronas adopts Aniah’s AI-powered OneCheck® platform to advance automotive semiconductor development
• India Hardens Its Cyber Defenses
• ICTK Partners with Jiran Security to Drive Post-Quantum Cryptography (PQC) Migration
• Programmable, ultra-low-power photonic circuits for artificial intelligence
• BrainChip Launches AKD1500 PCIe Card For Edge AI Evaluation Everywhere
• S2C Named Andes Technology’s 2026 Partner of the Year
• Significant Performance Gains Reinforce Imagination’s GPU-First Strategy
• SignatureIP Unveils MesoLink, a Mesochronous Bridge for PCIe/CXL Validation
• IonQ and Synopsys Report Up to 14.6% Faster Engineering Simulations
• GlobalFoundries and Marvell expand collaboration for next-generation optical connectivity
• Samsung Starts 2nm AI5 Chip Production for Tesla FSD and Optimus
• TSMC Scores Another 2nm Win: MediaTek's Dimensity 9600 Pro to Use N2P Process
• AI Drives New Semiconductor Patent Race Across Computing, Memory and Custom Silicon

Friday, September 18, 2026

• Dnotitia Brings Dedicated Vector Silicon to Server Scale at AI Infra Summit 2026
• M31 Expands Rambus Collaboration, Strengthening Its One-Stop MIPI Subsystem Solution

Wednesday, September 16, 2026

• Ceva Appoints Semiconductor Industry Veteran Ziv Hammer as Executive Vice President to Lead Connectivity & Sensing
• AI Drives New Semiconductor Patent Race Across Computing, Memory and Custom Silicon
• Samsung Electronics to Expand DDR5 Module Output Only Through Outsourcing
• ST is transforming semiconductor R&D: Moving from physical iteration to digital anticipation
• Keysight Joins Verizon 6G Innovation Forum to Accelerate Pre-Standard 6G Validation
• Synopsys Joins Arm Total Design for Physical AI to Advance Autonomous Systems
• Rambus Enhances Enterprise-Grade Security for Data Center and AI SoCs with CryptoManager™ Root of Trust Supporting the Caliptra™ Specification
• Cadence Tensilica IP Powers Analog Devices’ Next-Generation DSP Architecture
• Andes Technology Honors Quintauris as 2026 Partner of the Year
• SiFive and AMD Collaborate to Optimize AMD ROCm on RISC-V Datacenter Servers
• Keysight EDA Software Expands Access for European Chip Startups
• Synopsys Integrates Chip-to-System Design After Ansys Acquisition
• Samsung and Qualcomm reopen 2nm talks as yield gap with TSMC narrows
• New MIPI Alliance Kinematics Working Group to Standardize Streaming Format for Radar and Lidar Sensor Data

Tuesday, September 15, 2026

• Arteris Accelerates Industry Transition to Multi-Die Chiplet-Based Architecture
• TES Electronic Solutions Launches an Inductor-Less Switched Capacitor Boost‑Buck DC‑DC Converter IP.

Monday, September 14, 2026

• T2M Brings White-Box Licensing to ADC, DAC and PLL IP Cores, High-Performance, Full Modification Rights and Unlimited Usage
• Q2 Global Foundry Revenue Up 11.5%: Gap Widens Between TSMC and Samsung
• Renesas Launches 64-bit RZ/G3L and RZ/G3SE MPUs for Advanced HMI and IoT Edge Systems
• SkyeChip eyes next growth phase as homegrown IP starts to scale, Kenanga sees royalty potential
• Keysight EDA Software Expands Access for European Chip Startups
• Arm introduces new AI-native compute platform built for agentic AI and mobile graphics
• Arm unveils Arm AI Portal to accelerate optimized AI apps across the Arm compute platform
• OpenAI Samsung collaboration extends to next-generation chips
• Quintauris expands RISC-V ecosystem with new industry partnerships
• Chiplet-Based FPGAs Optimize Performance for Space Applications
• GlobalFoundries and Monolithic Power Systems form manufacturing partnership to scale high-performance power solutions
• SMIC Outgrows TSMC and Samsung With 20% Surge, Overtaking GlobalFoundries as World’s Third-Largest Foundry
• Intel Resolves 18A Yield Variability; A Storm to Engulf Samsung and TSMC?

Thursday, September 10, 2026

• Arasan furthers MIPI I3C® compliance with its participation at the I3C® interop in Taipei
• SEMI urges broader Chips Act 2.0 to boost Europe’s chip competitiveness
• BOS Semiconductors CEO Featured in Open Chiplet Atlas Community Voice
• Altera Adds Post-Quantum Security to Agilex 3 and Agilex 5 FPGAs
• GlobalFoundries’ MIPS Acies platform speeds up AI inference at the edge
• RISC-V extensions for high performance embedded computing
• SoC PLANNER: A New Generation of Automated SoC Design Exploration Managing Cost-Effectiveness and Sustainability
• QuantalRF Samples DPD-Efficient Linear Wi-Fi 7 and Wi-Fi 8 FEM with Up to 3dB More Mask-Compliant Power at 160 and 320 MHz
• Imec scales NbTiN superconducting circuits to 30nm
• Arm brings the ecosystem together to build and define the next phase of physical AI
• BOS Semiconductors Joins Arm Total Design for Physical AI
• Arm expands AI infrastructure for the agentic era with AGI CPU and Neoverse CSS N4
• EnSilica to open Space and Communications Semiconductor Centre of Excellence in Milan
• Samsung Electronics and ASML expand strategic collaboration for next-generation semiconductor manufacturing
• Intel Foundry and ASML Collaborate to Accelerate Industry Readiness for High NA EUV
• ASML and TSMC Announce Initiative to Pioneer Industry Transition to Large-Format Photomasks for High NA EUV
• Ceva and LG Electronics Partner to Accelerate UWB Adoption Across Automotive, Industrial and Consumer SoCs
• Qualitas Semiconductor Signs MIPI IP Integrated Solution Licensing Agreement with CoAsia SEMI

Wednesday, September 9, 2026

• RaiderChip Unites Generative AI and Autonomous Robot Control on a single NPU