Jan. 12, 2009 - Cadence Design Systems announced today that Fujitsu Microelectronics Limited has taped out a 65nm mobile WiMAX design using Fujitsu Reference Design Flow 3.0, which includes Common Power Format (CPF) enabled Cadence® Low-Power technologies.

Jan. 09, 2009 - Cadence Design Systems today announced that its Board of Directors has unanimously appointed Lip-Bu Tan as president and chief executive officer, effective immediately. Tan, who had been serving as interim vice chairman of the Board of Directors of Cadence® and member of the Interim Office of the Chief ...

Jan. 07, 2009 - Synopsys today announced that its DesignWare® digital controller and PHY IP for the PCI Express® 2.0 technology is the first complete, single-vendor PCI Express 2.0 IP solution to successfully pass the PCI Express 2.0 compliance testing at the PCI-Special Interest Group (PCI-SIG®) workshop held in ...

Dec. 22, 2008 - S2C is pleased to announce today its partnership with Phylinks to distribute an array of PHY Intellectual Properties (IP) in China. Phylinks’ IP products include PCI Express Gen 1 and Gen 2, SATA Gen I and Gen 2, USB 1.1, 2.0 and OTG, IEEE 1394a, and high-speed SerDes PHY cores.

Dec. 19, 2008 - IPextreme has validated its Multi-CAN Controller, its CJTAG-IEEE1149.7 IP cores and its 32-bit Power Architecture e200, V1 ColdFire, V2 ColdFire, 16-bit CR16CP and 8-bit HCS08 processor cores for use with Mentor Graphics Precision® Synthesis flow.

Dec. 16, 2008 - Under this agreement, ChipStart will offer LogicVision's ETCreate series Built-In Self-Test (BIST) and Built-In Self-Repair (BISR) software and IP products integrated into the new TestStart embedded memory system.

Dec. 15, 2008 - The field-programmable gate array (FPGA) market has experienced lackluster and flat growth in recent times. But now, the sector faces a set of new challenges that could threaten the business.

Dec. 11, 2008 - Cadence reported third quarter 2008 revenue of $232 million, compared to revenue of $401 million reported for the same period in 2007. On a GAAP basis, Cadence recognized a net loss of $169 million, or $(0.67) per share on a diluted basis, in the third quarter of 2008, compared to net income of $73 ...

Dec. 10, 2008 - The Freescale HCS08 is a synthesizable, state-of-the-art, high performance and low power 8-bit microprocessor that can be easily integrated into any ASIC or FPGA design. The HCS08 also provides an easy migration path to Freescale’s 32-bit ColdFire architecture.

Dec. 03, 2008 - The AMS draft 1 standard proposes the first definitions for the design and modeling of embedded analog/mixed-signal systems at higher levels of abstraction, such as those found in telecommunication, automotive and imaging sensor applications.

Dec. 04, 2008 - The solution enables the easy and flexible reuse of legacy Verification Methodology Manual (VMM) code within an OVM environment.

Dec. 04, 2008 - Cadence Design Systems today announced the release of an open-source SystemVerilog solution to help users include Synopsys' Verification Methodology Manual verification IP (VMM VIP) as they adopt the advanced environments supported by the Open Verification Methodology (OVM).

Dec. 04, 2008 - Cadence Design Systems today introduced six additional verification IP (VIP) to its Incisive® VIP portfolio, each designed to speed verification of designs based on the emerging Mobile Industry Processor Interface (MIPISM) standard.

Dec. 02, 2008 - EVE today announced the formation of the EVE University Connection Program created to supply universities with first-rate technology to bridge the integration of hardware and software for system-on-chip (SoC) design.

Dec. 02, 2008 - CHiL Semiconductor delivers highly intelligent and flexible power management solutions to the server CPU and memory, desktop CPU and graphics GPU markets, where enhanced performance, digital communication and energy efficiency are key metrics. The use of NVM in CHiL's solutions is transforming these ...

Nov. 21, 2008 - Cadence Design Systems today announced the promotion of three senior leaders to executive management positions in R&D and Worldwide Sales and Field Operations. All three positions report to the Interim Office of the Chief Executive.

Nov. 20, 2008 - IPextreme today announced that Teridian Semiconductor Corp., a leading supplier of mixed-signal integrated circuits (ICs) used in energy, automation, networking, and secure access systems, has licensed Freescale’s V2 ColdFire® SPP IP core through IPextreme.

Nov. 17, 2008 - Cadence Design Systems today announced the planned first quarter 2009 availability of new Open Verification Methodology (OVM) verification IP (VIP) for two key high-speed protocols: USB 3.0 and PCI Express 3.0.

Nov. 10, 2008 - SpyLinks(TM) Program Initiative Enables High Quality Register Transfer Level (RTL) Output from Electronic System Level (ESL) Synthesis Tools

Nov. 10, 2008 - ARM today announced the industry's first Silicon-on-Insulator (SOI) physical IP library including standard cell, memory and I/O libraries for IBM's fully enabled 45nm SOI foundry, also announced today.

Nov. 06, 2008 - The company expects to eliminate at least 625 full-time positions, representing 12% of its global employee base, plus a substantial number of contractors and consultants.

Nov. 04, 2008 - The co-operation enables IC designs and IP to be ported to a manufacturing standard in just a few weeks, typically offering upto 10X reductions in cycle time and engineering costs as well as freeing up customer’s engineers to focus on other potentially higher value added activities.

Nov. 04, 2008 - The New System VIP and SpeedBridge Adapters Speed Up Time to Market and Improve Quality, Further Extending Cadence Leadership in VIP Portfolio Breadth and Depth

Nov. 03, 2008 - The USB2.0 VIP is developed using SystemVerilog test benches based on VMM methodology using coverage-driven, constrained-random and assertion-based techniques.

Oct. 23, 2008 - Cadence initiated the review after preliminarily determining during its regular review of its third quarter results that approximately $24 million of revenue relating to these contracts was recognized during the first quarter of 2008, but should have been recognized ratably over the duration of the ...

Oct. 20, 2008 - The partnership between VaST and KPIT Cummins focuses on methodology adoption services that speed the deployment of advanced virtual prototyping tools and methodologies such as networked ECU Virtual-Hardware-In-the-Loop simulations.

Oct. 16, 2008 - Silicon Interfaces’ GEMAC core implements the Ethernet Media Access Control (MAC) protocol according to IEEE 802.3 specification. The MAC has a standard Gigabit Media Independent Interface (GMII) to connect to any PHY interface.

Oct. 15, 2008 - VIP Portfolio Extends to Over 30 Industry-Standard Protocols, Enabling Customers to Improve Schedule Predictability, Productivity, and Product Quality

Oct. 15, 2008 - The formation of the Interim Office of the Chief Executive followed Michael Fister’s resignation as President, Chief Executive Officer and a director of the company, by mutual agreement between Mr. Fister and the Board.

Oct. 07, 2008 - Cadence Design Systems announced today the availability of an ARM hardware/software co-verification environment that accelerates the system validation process and provides mutual customers with a faster path to first silicon working with early software.

Oct. 06, 2008 - Silicon Interfaces announces the availability of their OVM Based IEEE 1394-1995/1394a-2000 Link Layer Controller Open Verification Component (OVC) supporting multi-language verification environments.

Oct. 03, 2008 - IPextreme and Texas Instruments will hold a webinar on Thursday, October 9, 2008 on the first semiconductor IP solution to implement the new IEEE 1149.7 test and debug standard.

Sep. 24, 2008 - OKI Network LSI Co., Ltd., is reporting significant benefits from its use of the Open Verification Methodology (OVM) with Cadence Incisive functional verification technology. Co-developed by Cadence and released last year, the OVM is the first scalable, open, multi-vendor verification methodology for ...

Sep. 22, 2008 - Engineers at STMicroelectronic have revealed how to use domino logic, a very fast circuit design style utilized in the highest performance custom designs,in an automated framework.

Sep. 18, 2008 - IPextreme and Solarflare announced that after a successful release of the 10Xpress SFT9001 10GBASE-T PHY, the existing C166SV1 Microcontroller license has been extended.

Sep. 16, 2008 - Achronix Semiconductor today announced that it has already begun shipping the world's fastest FPGAs. The Speedster family, with the SPD60 as its initial member, delivers speeds up to 1.5 GHz, which represents a three-fold increase in performance over existing FPGAs.

Sep. 15, 2008 - Nuvation's McVFE reference design is based on Texas Instruments' (TI) DaVinci(TM) technology and TVP quad-channel video decoder with complementary FPGA technology provided by Xilinx's Spartan 3A FPGA technology.

Sep. 11, 2008 - The new release extends the proven sequential stimulus mechanism in the OVM with transaction-level modeling (TLM) interfaces to improve the modularity and reuse of stimulus sequences. Other enhancements include direct support for parameterized classes in the OVM factory and built-in debug support for ...

Sep. 11, 2008 - Pairing Sequence Design's PowerTheater, and the low-power design expertise of NemoChips and Faraday Technology Corporation, led to a 52 percent reduction in total power for an advanced mobile processor design.

Sep. 10, 2008 - These production-proven, ready-to-go design environments are accessible via the Internet and provide design teams a faster time-to-productivity with reduced risk and cost. Cadence Hosted Design Solutions are available for custom IC design, logic design, physical design, advanced low power, functional ...