Search News

Design IP News

• Ethernet IP Core for Next-Gen Automotive SoCs: Complementing CAN, LIN, and FlexRay with Scalable Connectivity (Monday, June 30, 2025)
• CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core (Friday, June 27, 2025)
• FH (Frequency Hopping) - OFDM Modem Available For Immediate Implementation From Global IP Core (Friday, June 27, 2025)
• VeriSilicon Expands DSP Portfolio with Silicon-Proven ZSP5000 Vision Core Series for Edge Intelligence (Thursday, June 26, 2025)
• eMemory's NeoFuse OTP Qualifies on TSMC's N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips (Thursday, June 26, 2025)
• Sofics Delivers Remarkable PPA & R Performance Near Physical Limits on TSMC 2nm Technology (Wednesday, June 25, 2025)
• AMD will launch PCIe 6.0 devices next year but consumers will have to wait almost half a decade to get it - here's why (Tuesday, June 24, 2025)
• Ceva Launches MotionEngine™ Hex: Bringing Precise, Touch-Free, Spatial Control to Smart TV, Gaming, and IoT Interfaces (Tuesday, June 24, 2025)
• Creonic's DVB-S2 and DVB-S2X IP Cores Now Support the New DVB-NIP Standard (Tuesday, June 24, 2025)
• Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC's 22nm Platform (Tuesday, June 24, 2025)
• SignatureIP Unveils Industry-Leading CXL 3.2 Solution for High-Performance Computing (Monday, June 23, 2025)
• Arteris Addresses Silicon Design Reuse Challenge with New Magillem Packaging Product for IP Blocks and Chiplets (Monday, June 23, 2025)
• Certified Automotive Ethernet, CAN XL, and LIN IP Cores — Proven, Qualified, and Ready for Seamless Integration (Monday, June 23, 2025)
• True Circuits Announces New and Improved Low-jitter Digital Ultra+ PLL that Offers Exceptional Performance, Features and Ease of Use (Monday, June 23, 2025)
• True Circuits Introduces the Low-jitter Digital Ultra+ PLL at the Design Automation Conference (Friday, June 20, 2025)
• CAST Launches Multi-Channel DMA IP Core Ideal for Streaming Applications (Thursday, June 19, 2025)
• DCD-SEMI Joins MIPI Alliance and Unveils Latest I3C IP at MIPI Plugfest Warsaw 2025 (Wednesday, June 18, 2025)
• Arteris Accelerates AI-Driven Silicon Innovation with Expanded Multi-Die Solution (Tuesday, June 17, 2025)
• SmartDV Introduces Advanced H.264 and H.265 Video Encoder and Decoder IP (Monday, June 16, 2025)
• Advanced MIPI IP Cores for Automotive, IoT, Consumer, Imaging & Display SoCs (Monday, June 16, 2025)
• Alphawave Semi at the Forefront of PCIe® 7.0 Specification: Showcasing Next-Gen Chiplet Interoperability and Optical PCIe Technology at PCI-SIG® Developers Conference 2025 (Thursday, June 12, 2025)
• I3C: The Next-Generation Serial Communication Bus (Wednesday, June 11, 2025)
• Synopsys Achieves PCIe 6.x Interoperability Milestone with Broadcom's PEX90000 Series Switch at PCI-SIG DevCon 2025 (Wednesday, June 11, 2025)
• Imec presents 150 GSa/s Digital-to-Analog Converter (DAC) achieving 300 Gb/s data transmission (Wednesday, June 11, 2025)
• Synopsys Achieves PCIe 6.x Interoperability Milestone with Broadcom's PEX90000 Series Switch at PCI-SIG DevCon 2025 (Wednesday, June 11, 2025)
• VeriSilicon's AI-ISP Custom Chip Solution Enables Mass Production of Customer's Smartphones (Wednesday, June 11, 2025)
• CFX's 130nm EEPROM IP Passes Customer Product-Level Evaluation, Ready for Mass Commercial Adoption (Wednesday, June 11, 2025)
• IP Cores, Inc. ships new FFT4T Streaming Multi-Channel FFT Core (Wednesday, June 11, 2025)
• Faraday Unveils FlashKit™-22RRAM: an eNVM-based SoC Development Platform for IoT (Tuesday, June 10, 2025)
• Silicon Proven DisplayPort 1.4 Tx & Rx PHY IP Cores, Ready to license in 12/28/40/55nm (Tuesday, June 10, 2025)
• sureCore launches comprehensive suite of silicon services (Tuesday, June 10, 2025)
• Qualitas Semiconductor Successfully Develops UCIe v2.0-Compliant PHY IP, Enabling Up to 512Gbps Die-to-Die Connectivity (Tuesday, June 10, 2025)
• VeriSilicon's Ultra-Low Energy NPU Provides Over 40 TOPS for On-Device LLM Inference in Mobile Applications (Tuesday, June 10, 2025)
• Andes Technology Unveils AndesAIRE™ AnDLA™ I370: A Next-Generation Deep Learning Accelerator for Edge and Endpoint AI (Sunday, June 8, 2025)
• Chips&Media Unveils WAVE-N: A Custom NPU for High-Quality, High-Resolution Imaging (Thursday, June 5, 2025)
• IP Cores, Inc. Announces New Shipment of PQC1 Hardware Accelerator for Post-Quantum Cryptography (Wednesday, June 4, 2025)
• 12-bit, 5MS/s SAR ADC IP Core for Ultra-Low Power Precision Applications: T2M Unveils New IP (Monday, June 2, 2025)
• Brite Semiconductor Releases TCAM IP based on 28HKC+ Process (Wednesday, May 28, 2025)
• CFX's 55nm BCD process OTP IP has been put on the shelves (Monday, May 26, 2025)
• High-Performance USB 3.2 Gen1 & Gen2 PHY and Controller IP Cores from T2M, Powers Next-Gen SoCs (Monday, May 26, 2025)
• Xiphera Wins ECSO STARtup Award 2025 for Innovation in Cybersecurity (Friday, May 23, 2025)
• Analogue Insight and Tetrivis Announce Joint Development of "Eurytion RFK1," a UCIe based 12nm Ka/Ku-Band RF Chiplet Transceiver (Friday, May 23, 2025)
• Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA (Wednesday, May 21, 2025)
• Expedera's Origin Evolution NPU IP Brings Generative AI to Edge Devices (Wednesday, May 21, 2025)
• BrainChip CTO to Present on Architectural Innovation for Low-Power AI at the Embedded Vision Summit (Wednesday, May 21, 2025)
• Movellus Claims First On-Die Power Delivery Network Analyzer (Tuesday, May 20, 2025)
• sureCore extends its sureFIT design service to include custom memory solutions for AI applications (Tuesday, May 20, 2025)
• InPsytech Joins Samsung SAFE™ IP Partner Program for Excellence in ONFI and UCIe IP Solutions (Monday, May 19, 2025)
• Semidynamics: From RISC-V with AI to AI with RISC-V (Monday, May 19, 2025)
• Codasip: Toward Custom, Safe, Secure RISC-V Compute Cores (Monday, May 19, 2025)