NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
1622 Results (281 - 320) |
-
Thalia expands with new analog design engineering facility
Jan. 22, 2018 - Thalia Design Automation today announced a significant expansion of its analog design engineering capabilities, with the opening of a new engineering center in Hyderabad, India. -
Andes Announces Advanced SoC Development Environments for V5 AndesCore N25 and NX25 Processors with Tool Partners
Nov. 20, 2017 - Andes Technology today announces the partnership with the world-class tools vendors including Imperas, Lauterbach, Mentor, a Siemens Business, and UltraSoC (in alphabetical order) to bring their system-on-chip (SoC) development environments to Andes V5 processors and the RISC-V community. -
Faraday Unveils M1+ Library with Enhanced Routability on UMC 28HPC Process
Nov. 16, 2017 - Faraday Technology today introduced its M1+ standard cell library on UMC 28HPC process. This optimized M1+ library supports the essential multi-track cells (7T/9T/12T), multi-Vt cells (LVT/RVT/HVT), and Faraday low-power PowerSlash™ kit to build the best portfolio of power, performance, and area metrics ... -
Global Unichip Achieves Critical ISO 13485:2016 Certification for Medical Device Components
Nov. 25, 2017 - GUC today announced the achievement of highly coveted ISO 13485:2016 certification, which make GUC the first and only ASIC company to meet these demanding standards and will strengthen qualities of medical IC design and manufacturing services. -
Open-Silicon to Demonstrate its High Bandwidth Memory (HBM2) IP Subsystem Solution for High Performance Computing and Networking Applications and Showcase its IoT Gateway SoC Reference Design for Smart City Applications at ARM TechCon 2017
Oct. 16, 2017 - Open-Silicon, a system-optimized ASIC solutions provider, will be exhibiting at ARM TechCon 2017. The company will demonstrate its IoT Edge SoC Platform Solution, IoT Gateway SoC Reference Design and Comprehensive High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs in TSMC 16nm FF+. -
Samsung Certifies Synopsys Design Platform for 28nm FD-SOI Process Technology
Sep. 25, 2017 - Synopsys today announced that the Synopsys Design Platform has been fully certified for use on Samsung Foundry's 28FDS (FD-SOI) process technology. A Process Design Kit (PDK) and a comprehensive reference flow, compatible with Synopsys' Lynx Design System, containing scripts, design methodologies and ... -
Intel Custom Foundry Certifies Synopsys Design Platform for Intel's 22nm FinFET Low Power Process Technology
Sep. 19, 2017 - -
AFuzion and HDL Design House Joint Webinar: Optimizing DO-254: October 4, 2017, 4 pm CEST
Sep. 19, 2017 - AFuzion and HDL Design House invite you to join the free October 4, 2017 webinar on DO-254 optimization techniques including DO-254 requirements, mistakes, best practices, and use of random verification and UVM methodology. -
Sidense and Intellitech collaborate on Electronic Chip IDs, anti-counterfeiting and semiconductor security for Secure Supply Chain Enablement
Sep. 12, 2017 - -
Open-Silicon Completes Successful Silicon Validation of High Bandwidth Memory (HBM2) IP Subsystem Solution
Sep. 12, 2017 - Open-Silicon, a system-optimized ASIC solution provider, today announced it has successfully completed silicon validation of its High Bandwidth Memory (HBM2) IP subsystem in TSMC’s 16nm FinFET technology in combination with TSMC’s CoWoS® 2.5D silicon interposer technology and HBM2 memory. -
Cadence Collaborates with TSMC to Advance 7nm FinFET Plus Design Innovation
Sep. 11, 2017 - Cadence today announced its collaboration with TSMC to advance 7nm FinFET Plus design innovation for mobile and high-performance computing (HPC) platforms. -
Synopsys' IC Compiler II Completes Certification for TSMC's 12-nm Process Technology
Sep. 11, 2017 - Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC has certified IC Compiler™ II place-and-route system and Synopsys Design Platform for the V1.0 production of its latest 12-nanometer (nm) FinFET process technology. -
Truechip-Moving Towards 10 Years of Successfulness
Jul. 27, 2017 - Next Year in 2018, Truechip -The Verification IP specialist, would be celebrating 10 years of continued successfulness. Truechip’s completing 10 years would be a significant milestone for the company. -
Cadence Genus Synthesis Solution Enables Toshiba to Complete a Successful ASIC Tapeout with a 2X Logic Synthesis Runtime Improvement
Jul. 20, 2017 - Cadence today announced that Toshiba Electronic Devices & Storage Corporation used the Cadence® Genus™ Synthesis Solution to complete a successful ASIC design tapeout. -
Mentor Adds Veloce Strato Emulation Platform Software to Mentor Safe ISO 26262 Qualification Program
Jul. 20, 2017 - Mentor, a Siemens business, announces that independent compliance firm SGS-TÜV Saar has certified the ISO 26262 compliance of tool qualification reports for key software elements of its groundbreaking new Veloce® Strato™ emulation platform. -
Veriest Solutions and CEVA Collaborate for Neural Network Signal Processing IP Project
Jul. 13, 2017 - Veriest Solutions, a leading VLSI Design Services house, announced that it successfully completed a project with CEVA for the development of a complex neural network signal processing IP. -
eASIC Recognizes Growth in Demand From China and Establishes eASIC Shenzhen WFOE
Jun. 28, 2017 - eASIC, a fabless semiconductor company that delivers a custom integrated circuit (IC) platform (eASIC Platform), today announced the establishment of eASIC (Shenzhen) Technology Services Co. Ltd., a wholly foreign owned enterprise (WFOE) in Shenzen, China. -
ArterisIP and ResilTech Announce Strategic Partnership to Facilitate ISO 26262 Compliance for Complex Autonomous Automotive Systems
Jun. 20, 2017 - ArterisIP and ResilTech S.R.L. today announced a strategic partnership to help semiconductor design teams efficiently validate ISO26262 functional safety levels for automotive systems-on-chip. -
Truechip Collaborates with OmniPhy for Verification of PCIe Gen4 IP solution
Jun. 19, 2017 - Truechip Solutions, the Verification IP specialist and OmniPhy, a leading mixed-signal semiconductor IP company, today announced association for collaborative verification of PCIe Gen 4. The two companies enter into a partnership to provide the customers a solution that is comprehensively tested and ... -
GLOBALFOUNDRIES Launches 7nm ASIC Platform for Data Center, Machine Learning, and 5G Networks
Jun. 13, 2017 - GLOBALFOUNDRIES today announced the availability of FX-7 TM, an application-specific integrated circuit (ASIC) offering built on the company’s 7nm FinFET process technology. FX-7 is an integrated design platform that combines leading-edge manufacturing process technology with a differentiated suite ... -
Vidatronic to Exhibit at 54th Design Automation Conference (DAC) in Austin, TX
Jun. 12, 2017 - Vidatronic, designer and licensor of power management circuit IP, is exhibiting at the 54th annual Design Automation Conference (DAC) this summer in Austin, TX. -
STMicroelectronics Standardizes on Synopsys VC Formal for Faster Verification Closure of Leading Microcontroller Designs
Jun. 07, 2017 - Synopsys, Inc. (Nasdaq:SNPS), today announced that STMicroelectronics selected and standardized on Synopsys VC Formal, as their formal verification solution for advanced microcontroller designs. -
Mentor Ushers in New Era of C++ Verification Signoff with New Catapult Tools and Solutions
Jun. 06, 2017 - Mentor, a Siemens business, today announced three new tools - Catapult® Coverage, Catapult Design Checks and SLEC® HLS – and enhancements to Catapult HLS. -
EDA pioneer Alberto Sangiovanni-Vincentelli joins UltraSoC advisory board
Jun. 01, 2017 - UltraSoC, the leading developer of on-chip monitoring and analytics IP, today announced that Alberto Sangiovanni-Vincentelli, a founding-father and driving force in both commercial and technological developments in the electronics design industry, has joined the company’s Strategic Advisory Board. -
Unprecedented growth at EnSilica sees a major recruitment drive to fuel its continued expansion
May. 22, 2017 - Unprecedented growth of over 80% this year at EnSilica, a leading independent provider of semiconductor solutions and IP, has created a further requirement within the company for a major recruitment drive to fuel its continued expansion in the next 12 months and beyond. -
Cadence Introduces First Interface and Verification IP Solution for CCIX to Advance New Class of Datacenter Servers
May. 02, 2017 - Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the industry’s first interface and verification IP solution for Cache Coherent Interconnect for Accelerators (CCIX), an open chip-to-chip interconnect standard that advances the development of a new class of server solutions to address the ... -
eASIC and Comcores Announce Support for CPRI V7.0
May. 01, 2017 - eASIC® Corporation, a fabless semiconductor company that delivers a custom integrated circuit (IC) platform (eASIC Platform), and Denmark Headquartered Comcores ApS, a specialized supplier of silicon intellectual property (SIP), today announced the support of CPRI V7.0 (CPRI Specification CPRI_v_7_0 ... -
eASIC and Mobiveil Announce Flash Reliability Platform
Apr. 25, 2017 - eASIC and Mobiveil today announced that Mobiveil’s Flash Reliability IP is now available for use in the eASIC Nextreme-3S family. -
ClioSoft, OneSpin and Truechip Sponsor the Ninth Annual I LOVE DAC Campaign at the 54th Design Automation Conference
Apr. 03, 2017 - ClioSoft, OneSpin Solutions and Truechip; are sponsoring free three-day exhibit floor passes to the 2017 Design Automation Conference (DAC). -
Open-Silicon to Showcase its Spec2Chip IoT SoC Platform Solution Consisting of IoT Edge SoC Platform and IoT Gateway SoC Platform at IoT DevCon Santa Clara on April 26-27, 2017
Apr. 10, 2017 - Open-Silicon, a system-optimized ASIC solutions provider, will be exhibiting at IoT DevCon in Santa Clara on April 26-27, 2017 to demonstrate its IoT Edge SoC Platform and IoT Gateway SoC Platform. Please visit our booth on the exhibition floor to view the demos and to learn about other innovative ASIC/SoC ... -
Cadence Unveils Expanded Virtuoso Advanced-Node Platform for 7nm Processes
Apr. 05, 2017 - Cadence today announced the release of the new Virtuoso® Advanced-Node Platform supporting advanced 7nm designs. Through collaboration with early 7nm FinFET customers, Cadence has expanded the Virtuoso custom design platform with innovative new capabilities to manage design complexity and process effects ... -
Open-Silicon Unveils Industry's Highest Performance Interlaken Chip-to-Chip Interface IP
Apr. 04, 2017 - Open-Silicon today announced its eighth-generation Interlaken IP core, supporting up to 1.2 Tbps high-bandwidth performance and up to 56 Gbps SerDes rates with Forward Error Correction (FEC). -
OmniPHY Unveils 25G Backplane SerDes Silicon on TSMC 28nm Technology
Mar. 30, 2017 - OmniPHY Inc. today announced silicon availability of its industry-leading, low-latency backplane SerDes PHY which delivers enterprise-class performance in demanding backplane applications. -
C-SKY Microsystems selects Dolphin Integration's energy management offering for smart voice-interacted devices
Mar. 27, 2017 - Dolphin Integration, the leading provider of solutions for Energy Management, and Hangzhou C-Sky Microsystems, a China-based embedded microprocessor core IP provider, announced today their collaboration on an ultra-low power human-machine interface SoC platform. -
Cadence Achieves Certification for TSMC's 7nm Process Technology
Mar. 14, 2017 - Cadence today announced several new capabilities resulting from its close collaboration with TSMC to further 7nm FinFET design innovation for mobile and high-performance computing (HPC) platforms. -
GreenWaves Technologies Partners with Open-Silicon to Develop Industry's First IoT Processor Based on PULP and RISC-V
Mar. 13, 2017 - Open-Silicon today announced it was selected by GreenWaves Technologies to develop GAP8, the industry’s first IoT processor. GAP8 is built on the open source Parallel Ultra Low Power (PULP) and RISC-V ISA projects. -
Open-Silicon Announces IoT Gateway SoC Platform
Mar. 13, 2017 - Underscoring its commitment to the IoT market, Open- Silicon today announced the development of an IoT gateway SoC platform that enables complete Spec2Chip development of custom silicon solutions for emerging IoT gateway applications. -
Codasip and TVS Deliver Advanced RISC-V Verification Solutions
Mar. 10, 2017 - Codasip, a leading RISC-V processor IP provider, and T&VS (Test and Verification Solutions), a leading verification services provider for semiconductor IP, hardware and software, today announced a broad collaboration to accelerate the verification of products based on the Codix-Bk series of RISC-V compliant ... -
Arteris Announces PIANO 2.0 Automated Interconnect Timing Closure Technology
Mar. 08, 2017 - Arteris today announced its next generation automated interconnect timing solution – the PIANO 2.0 Timing Closure Package. PIANO 2.0 builds on customer silicon experience gathered with FlexNoC Physical™ package to automate interconnect timing closure for both cache coherent and non-coherent subsystems. ... -
Xilinx Demonstrates Responsive and Reconfigurable Vision Guided Intelligent Systems at Embedded World 2017
Mar. 02, 2017 - Xilinx is demonstrating responsive and reconfigurable vision guided intelligent systems at Embedded World 2017. Conference presentations and demonstrations will show how Xilinx's tools, libraries and methodologies infuse machine learning, computer vision, sensor fusion, and connectivity into vision ...