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TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries, multiple metalstacks
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Cadence Methodology Powers Samsung Electronics' Advanced SOC Design Environments
Dec. 16, 1999 - Cadence Methodology Powers Samsung Electronics' Advanced SOC Design Environments -
Cadence adds system-level design tool to EDA flow
Jan. 10, 2000 - Cadence adds system-level design tool to EDA flow -
CoWare to Enter Licensing and Technical Support Agreement with Sony To Speed Chip Design for Sony's Next-Generation AV-IT Products
Jan. 25, 2000 - CoWare to Enter Licensing and Technical Support Agreement with Sony To Speed Chip Design for Sony's Next-Generation AV-IT Products -
Silterra Selects Avant! as Provider of Intellectual Property Cell Libraries
Feb. 14, 2000 - Silterra Selects Avant! as Provider of Intellectual Property Cell Libraries -
Quickturn Partners With Simutech to Develop Next-Generation System-On-Chip Rapid Prototyping Solutions
Feb. 21, 2000 - Quickturn Partners With Simutech to Develop Next-Generation System-On-Chip Rapid Prototyping Solutions -
CoWare N2C Version 2.1 Enhances Simulation Performance and Accuracy
Mar. 01, 2000 - CoWare N2C Version 2.1 Enhances Simulation Performance and Accuracy -
Design VERIFYer 3.0 Increases Avant!'s Lead in Formal Equivalence Checking
Mar. 06, 2000 - Design VERIFYer 3.0 Increases Avant!'s Lead in Formal Equivalence Checking -
Pivotal Technologies receives major customer win from Texas Instruments
Mar. 06, 2000 - Pivotal Technologies receives major customer win from Texas Instruments -
SoC Design Productivity Enhancement from YXI: XE Tool Suite version 1.3
Mar. 20, 2000 - SoC Design Productivity Enhancement from YXI: XE Tool Suite version 1.3 -
Synopsys' move to free libraries may rattle IP market
Mar. 20, 2000 - Synopsys' move to free libraries may rattle IP market -
Xilinx and Qualis Partner to Develop Internet-enabled Design Reuse Methodology for ASIC and FPGA Designers
Mar. 20, 2000 - Xilinx and Qualis Partner to Develop Internet-enabled Design Reuse Methodology for ASIC and FPGA Designers -
OpenMORE RTL Rule Checker from Interra Accelerates Evaluation and Assessment of Reusable IP From Months to Days
Mar. 20, 2000 - OpenMORE RTL Rule Checker from Interra Accelerates Evaluation and Assessment of Reusable IP From Months to Days -
OpenMORE RTL Rule Checker from Interra Accelerates Evaluation and Assessment of Reusable IP From Months to Days
Mar. 20, 2000 - OpenMORE RTL Rule Checker from Interra Accelerates Evaluation and Assessment of Reusable IP From Months to Days -
Fujitsu climbs Web-based design learning curve
Mar. 21, 2000 - Fujitsu climbs Web-based design learning curve -
Design reuse requires culture change, IP developers say
Mar. 23, 2000 - Design reuse requires culture change, IP developers say -
Monterey Design Systems announces physical design prototyping tool for design closure of ASIC and ASSP designs
Mar. 27, 2000 - Monterey Design Systems announces physical design prototyping tool for design closure of ASIC and ASSP designs -
Cadence Selects inSilicon Technology for System-on-Chip Design Services
Mar. 30, 2000 - Cadence Selects inSilicon Technology for System-on-Chip Design Services -
IKOS Systems and CoWare Announce Strategic Partnership to Link System-level Design and Design Verification
Apr. 03, 2000 - IKOS Systems and CoWare Announce Strategic Partnership to Link System-level Design and Design Verification -
Date yields testimonials and processor cores
Apr. 10, 2000 - Date yields testimonials and processor cores -
Avant! Offers No Cost and Royalty Free Libra-Visa Libraries
May. 01, 2000 - Avant! Offers No Cost and Royalty Free Libra-Visa Libraries -
Real Intent announces industry's first intent-driven verification system
May. 08, 2000 - Real Intent announces industry's first intent-driven verification system -
Xilinx tunes tools for big FPGA
May. 08, 2000 - Xilinx tunes tools for big FPGA -
Xilinx Transforms IP Center On Web Into First Portal for FPGA Intellectual Property
May. 10, 2000 - Xilinx Transforms IP Center On Web Into First Portal for FPGA Intellectual Property -
Synplicity's "Partners in Prototyping" takes the guesswork out of ASIC RTL prototyping
May. 15, 2000 - Synplicity's "Partners in Prototyping" takes the guesswork out of ASIC RTL prototyping -
NEC Electronics tips high-level design initiative
May. 16, 2000 - NEC Electronics tips high-level design initiative -
Altius offers design foundry services
May. 16, 2000 - Altius offers design foundry services -
Broadcom Corporation to acquire Pivotal Technologies Corp. a leading-edge developer of DVI and wireless communications solutions
May. 23, 2000 - Broadcom Corporation to acquire Pivotal Technologies Corp. a leading-edge developer of DVI and wireless communications solutions -
Synopsys and Mentor Graphics to Publish Japanese Translation of Industry-Standard Reuse Methodology Manual
May. 29, 2000 - Synopsys and Mentor Graphics to Publish Japanese Translation of Industry-Standard Reuse Methodology Manual -
New Hardware Embedded Simulation (HES[tm]) Technology
May. 29, 2000 - New Hardware Embedded Simulation (HES[tm]) Technology -
MIPS Technologies and Chartered Semiconductor complete architecture verification of MIPS-based cores in Silicon
May. 31, 2000 - MIPS Technologies and Chartered Semiconductor complete architecture verification of MIPS-based cores in Silicon -
ARM joins Verisity's pure IP program
Jun. 05, 2000 - ARM joins Verisity's pure IP program -
IP reuse called essential to advanced chip designs
Jun. 06, 2000 - IP reuse called essential to advanced chip designs -
ARC Cores revolutionizes 32-bit microprocessor enhancements with plug-in extensions
Jun. 14, 2000 - ARC Cores revolutionizes 32-bit microprocessor enhancements with plug-in extensions -
Mentor Graphics Named Leading IP Services Provider and Commodity IP Vendor In Inaugural Dataquest IP Market Study
Jun. 20, 2000 - Mentor Graphics Named Leading IP Services Provider and Commodity IP Vendor In Inaugural Dataquest IP Market Study -
ARM Strengthens Technology Access Program with Global Network of Design Centers
Jun. 20, 2000 - ARM Strengthens Technology Access Program with Global Network of Design Centers -
STMicroelectronics and CoWare Announce Comprehensive Partnership For System-Level Design
Jul. 10, 2000 - STMicroelectronics and CoWare Announce Comprehensive Partnership For System-Level Design -
ARM Forms Equity Alliance with CoWare
Jul. 18, 2000 - ARM Forms Equity Alliance with CoWare -
ARM Offers New Low-Cost Evaluation Board
Jul. 25, 2000 - ARM Offers New Low-Cost Evaluation Board -
Atmel adds DSP Group's Teak DSP Core to IP Library
Aug. 14, 2000 - Atmel adds DSP Group's Teak DSP Core to IP Library -
Standards group VSIA focuses on adoption challenges
Aug. 16, 2000 - Standards group VSIA focuses on adoption challenges
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