Bluetooth Dual Mode v5.4 / IEEE 15.4 PHY/RF IP in TSMC22nm ULP
1603 Results (1081 - 1120) |
-
ESL needs more work, panelists say
Feb. 10, 2006 - Electronic system level (ESL) design tools and methodologies have value, but many capabilities have yet to be developed, according to users and vendor representatives at a panel at the DesignCon 2006 conference here Wednesday (Feb. 8) -
Denali Appoints Raju Pudota as Managing Director of India Subsidiary
Feb. 07, 2006 - Industry Veteran to Run Denali Design Systems Private Limited in Bangalore, India -
Global Unichip Announced the World No.1 UTM0034A, an ARM926EJ Testchip with 2 AHB Interfaces to Shorten Time-to-Design & Time-to-Market
Jan. 26, 2006 - Global Unichip Corp. (GUC), a leading SoC design foundry and TSMC partner, today announced the world first and only one ARM926EJ testchip UTM0034A(TM) featuring 2 sets of AHB interface. Unlike other circulated testchip solutions with single AHB interface, -
VeriSilicon Tapes out Flip-Chip Design With Cadence Encounter
Jan. 24, 2006 - VeriSilicon Holdings Co., Ltd. (VeriSilicon), a leading ASIC design foundry, today announced that VeriSilicon has successfully taped out a complex, high-speed, flip-chip SoC using an automatic flip-chip flow based on the Cadence® Encounter® digital IC des -
Magma Welcomes Five New IP Partners into MagmaTies Program
Jan. 23, 2006 - Analog and Mixed-Signal IPs, I/O Libraries, Network-on-Chip Interfaces, WiMAX IPs and Magma Software Speed Development of Next-Generation SoC Designs -
Faraday Adopts Mentor Graphics Eldo as Their Internal SPICE Simulator
Jan. 11, 2006 - Mentor Graphics Corporation (Nasdaq: MENT) and Faraday Technology Corporation (TAIEX: 3035) today jointly announced that Faraday has adopted the Mentor Graphics Eldo® simulation tool as their internal SPICE simulator for cell library and IP characterizati -
Fujitsu to Construct New Fab for Logic Chips Employing 65nm Process Technology and 300mm Wafers
Jan. 11, 2006 - Second 300mm facility boosts production capacity at Mie semiconductor plant -
eInfochips Offers SystemVerilog Migration Services from Legacy Verification Environments
Jan. 10, 2006 - IP-Enabled Services Firm Joins Synopsys' SystemVerilog Catalyst Program -
ARC and Global Unichip Partner to Speed Digital Audio System-on-Chip Designs For Greater China's Semiconductor Industry
Dec. 19, 2005 - Partnership Shortens Time to Market for Fabless Chip Companies Targeting High Growth Digital Audio Market -
MIPS Technologies Becomes Charter Member of RDL Alliance
Dec. 15, 2005 - Joins Denali, Mentor, and Rambus in Program to Standardize Use of Register Description Language for Design and Delivery of IP Products -
Denali Forms Industry Alliance for Use of Register Description Language
Dec. 15, 2005 - Charter Members Denali, Mentor Graphics, MIPS, Rambus Promote Use of RDL for Design and Delivery of IP products -
Juan M. Chapa Joins Tensilica as Vice President of North American Sales
Dec. 13, 2005 - Chapa joined Tensilica from ARM / Artisan, where he was senior director of North American sales -
Cadence Delivers New RF Design Kit Targeting Customer Design Challenges in Wireless
Dec. 12, 2005 - Latest Kit Continues Cadence Execution on Strategy to Address Key Vertical Market Applications -
Actel Design Environment Enables Fast, Easy Implementation of World's First Mixed-Signal FPGA
Dec. 12, 2005 - Libero IDE and Starter Kit Empower System Designers to Fully Exploit the Actel Fusion Programmable System Chip -
Proven Software Solutions tackles the compounding complexity challenges of embedded software development
Dec. 08, 2005 - Through software reuse, Proven Software Solutions will improve and change the way embedded software is developed, reducing development risks, helping to manage complexity and enabling Device Software Optimisation (DSO) for embedded software developers eve -
S3 Joins ChipEstimate.com IP Partners Program
Dec. 06, 2005 - The alliance delivers the complete portfolio of IP developed by S3 to all users of Giga Scale IC's InCyte chip estimation software. -
Globetech Solutions adds CE-ATA to portfolio of Verification IP
Nov. 30, 2005 - Globetech Solutions' VIP fully automates verification of CE-ATA compliant Hosts or Devices. -
eInfochips Strengthens RTL-to-GDSII Design Service Capabilities, Adopts Magma IC Implementation Flow
Nov. 21, 2005 - Advanced technology and expert designers provide rapid time to market and lower development costs -
Tenison Demonstrates First Solution Reusing HDL RTL in ESL Design
Nov. 21, 2005 - Tenison Design Automation, a company focused on delivering tools for accelerating ESL design, has announced the first public showing of VTOC and the ARM® RealView® SoC Designer with MaxSim™ technology, for incorporating existing RTL into new SystemC ESL d -
Infineon and Chartered Expand Development Collaboration with 65nm Manufacturing Agreement
Nov. 17, 2005 - Infineon will have Chartered manufacture low-power mobile-phone products, with initial prototypes expected in the first quarter of 2006 and production scheduled to begin in the fourth quarter of 2006 -
Denali's Blueprint Product Supports SPIRIT 1.1 Specification
Nov. 17, 2005 - By automatically generating or reading the XML schema provided in the SPIRIT specification, Blueprint enables consistent specification and management of the control register space in chip designs and third-party IP blocks, speeding the development of hard -
Tata Elxsi Announces Breakthrough 802.16d/e PHY and MAC IP Implemented Completely in C/C++
Nov. 17, 2005 - WiMAX IP, based on Stretch’s software-configurable processor, offers unprecedented flexibility and time-to-market advantages -
DSP Chip Market to Continue Fast Growth Through 2009
Nov. 15, 2005 - One of the fastest-growing components employed in systems, Digital Signal Processors (DSPs), with worldwide unit shipments estimated at 1.5 billion units in 2004, will grow to approximately 2.8 billion units by the end of 2009, reports In-Stat. -
Tektronix, Altera, and FS2 Collaborate on Real-Time Logic Debug Solution for Altera FPGAs
Nov. 16, 2005 - Tektronix® TLA Logic Analyzers, Altera Quartus II Design Software Version 5.1, and FS2 FPGAView Software Provide Complete Debug Packag -
Integrated Developer's Kit Accelerates Design of Software Defined Radio
Nov. 14, 2005 - Celoxica and Sundance Offer Programmable Solution for Design of Wireless Communications Applications -
Initial Ballot to Make e Language an IEEE Standard Passes Overwhelmingly
Nov. 14, 2005 - Vote For IEEE P1647Draws Nearly 100% Support; e Language Continues Accelerated Path Toward Final Standardization on March 28 -
Tensilica Announces Design Center Agreement With Tata Elxsi Ltd.
Nov. 14, 2005 - New Authorized Design Center Will Provide Turnkey LSI Design Services For Tensilica Customers -
UMC Brings Comprehensive Reference Design Flow to 90nm SoC Designers
Nov. 09, 2005 - RTL-to-GDSII flow addresses signal and power integrity while incorporating DFM solutions to help customers streamline their path to silicon -
Tools help harness multicore power
Nov. 07, 2005 - While the benefits of multiple cores have been well-documented, the programming tools have not-until now -
Mistral Joins Xilinx Alliance Program
Oct. 25, 2005 - Will offer design services and total solutions on Xilinx Programmable Logic -
Go with the EDA flow, says SPIRIT
Oct. 25, 2005 - The SPIRIT Consortium is a global organisation concerned with supply-chain collaboration looking to provide a practical answer to multi-vendor design-flow integration, says vice-chairman Christopher Lennard -
Freescale exec says central design pays dividends
Oct. 21, 2005 - Changes in Freescale Semiconductor's approach to chip design, including centralization of methodologies and tools and the appointment of a renowned design manager, are contributing to improvements in the company's bottom line, according to Sumit Sadana, s -
Virage Logic and MIPS Technologies Accelerate Processor Performance With Core-Optimized IP Kits
Oct. 20, 2005 - Performance Enhancements Enable Additional Functionality and Design Headroom -
ESL providers get practical
Oct. 17, 2005 - A quiet shift is emerging in electronic system-level design. Rather than look to upend existing methodologies, ESL providers are moving toward practical tools that solve real and immediate problems. -
Emerging Chip Interconnections Poised For Growth
Oct. 12, 2005 - Three emerging chip-to-chip interconnections: HyperTransport, PCI Express, and RapidIO are being increasingly integrated into semiconductors and systems, and shipments bearing these technologies will grow over the next several years, reports In-Stat -
GDA Technologies and Arkados Inc. Collaborate to Deliver Fully Functional HomePlug SoC in Record Time
Oct. 06, 2005 - The collaboration of the two companies resulted in a fully functional, HomePlug®-compliant powerline networking system-on-chip -
Cadence Aligns Capabilities for Consumer and Mobile Applications to Support ARM's Cortex-A8 Processor
Oct. 04, 2005 - Encounter Synthesis, Implementation, and Verification with Cadence Services Enable Flexible Path to High-Performance, Low-Power Design for New ARM Processor -
Chartered Appoints Dr. Simon Yang as SVP and CTO
Oct. 04, 2005 - Chartered Appoints Dr. Simon Yang as SVP and CTO -
Silicon & Software Systems completes 65 nm Consumer Chip with Cadence Encounter
Oct. 04, 2005 - Production 65 Nanometer RTL-to-GDS Design Flow Supports Rapid Development of 500MHz IC in Leading-Edge Nanometer Silicon Technology -
Eureka Technology Successfully Demonstrated PCI Express Compliant Platform
Sep. 30, 2005 - The PCI Express demonstration system is a result of the collaboration and partnership between Eureka Technology and Rambus.