D&R Headline News (Last 14 Days)
Headlines for Monday Mar. 18, 2024
After TSMC fab in Japan, advanced packaging facility is next
Japan’s efforts to reboot its chip industry are likely to get another boost: an advanced packaging facility set up by TSMC. That seems a logical expansion to TSMC’s $7 billion front-end chip manufacturing fab built in Kumamoto on Japan’s southern island Kyushu.- A System On Module (SoM) developed by Electra IC: BitFlex-SPB-A7 FPGA SoM
- Weebit Nano to demo its ReRAM technology on GlobalFoundries' 22FDX® platform
Headlines for Friday Mar. 15, 2024
SoC Secure Boot Hardware Engine IP Core Now Available from CAST
New IP provides fast, area-efficient, processor-agnostic protection against booting a system from malicious or otherwise insecure codeHeadlines for Thursday Mar. 14, 2024
Former Moortec executives create chip monitor startup
Stephen Crosher and other former executives with Moortec Semiconductor Ltd. have founded Monic Semiconductor Ltd. (Plymouth, England).- QuickLogic and Zero-Error Systems Partner to Deliver Radiation-Tolerant eFPGA IP for Commercial Space Applications
- embedded world 2024: Codasip demonstrates CHERI memory protection
- Canaan's RISC-V based edge AIoT SoC adopted VeriSilicon's ISP and GPU IPs
- PrimisAI Unveils Premium Version of RapidGPT, Redefining Hardware Engineering
Headlines for Wednesday Mar. 13, 2024
Arteris Expands Ncore Cache Coherent Interconnect IP To Accelerate Leading-Edge Electronics Designs
Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced the immediate availability of the latest release of Ncore cache coherent network-on-chip (NoC) IP.- Tenstorrent and MosChip Partner on High Performant RISC-V Design
- Arm's Broadest Ever Automotive Enhanced IP Portfolio Designed for the Future of Computing in Vehicles
- Arteris Expands Automotive Solutions for Armv9 Architecture CPUs
- HBM3 Initially Exclusively Supplied by SK Hynix, Samsung Rallies Fast After AMD Validation, Says TrendForce
- We'll Need Many More Fabs to Meet $1 Trillion by 2030 Goal
- Arasan proudly releases its Radiation Hardened NAND Flash IP
- Arasan proudly introduces the VESA VDC-M Encoder and Decoder IP
- Siemens to demonstrate first pre-silicon simulation environment for Arm Cortex-A720AE for Software Defined Vehicles
- Cadence Collaborates with Arm to Jumpstart the Automotive Chiplet Ecosystem
- Ecosystem Collaborations Bring Full Stack Software Solutions to Develop Leading-edge Automotive Applications From Day One
- Arm Announces New Automotive Technologies to Accelerate Development of AI-enabled Vehicles by up to Two Years
- University of Western Australia Latest to Join the BrainChip University AI Accelerator Program
Headlines for Tuesday Mar. 12, 2024
Tiempo Secure's TESIC RISC-V IP Secure Element successfully characterized on GlobalFoundries' 22FDX technology node
Tiempo Secure’s certified TESIC RISC-V Secure Element was implemented in GlobalFoundries' (GF) 22FDX® platform with MRAM, after a rigorous characterization process. The Secure Element also passed the CC EAL5+ AVA_VAN.5 security assessment testing with the ITSEF SERMA laboratory.- Agile Analog delivers first full always-on IP subsystem
- Andes Technology: Cultivating Academic Collaboration for Over a Decade with Sustainable Spirit
- Global Top 10 Foundries Q4 Revenue Up 7.9%, Annual Total Hits US$111.54 Billion in 2023, Says TrendForce
Headlines for Monday Mar. 11, 2024
Alphawave Semi Demonstrates 3nm Silicon-Proven 24Gbps Universal Chiplet Express (UCIe) Subsystem for High-Performance AI Infrastructure
Alphawave Semi today announced the successful bring-up of its first chiplet-connectivity silicon platform on TSMC’s most advanced 3nm process.- Re-imagining Imagination Technologies
- Omni Design Technologies Offers Swift™ Data Converters for Advanced Software Defined Radio (SDR) Solutions
- OPENEDGES and SEMIFIVE Partnership Reinforce the SoC Platform
- Elevate the performance of your Automotive Application by integrating the IP cores of a 14-bit wideband Time-Interleaved Pipeline Data Converters
Headlines for Friday Mar. 08, 2024
Credo Launches 112G PAM4 SerDes IP for TSMC N3 Process Technology
Credo expands its unique programmable power versus channel reach performance SerDes technology to TSMC N3 and N7/N6 processes- TSMC February 2024 Revenue Report
- CAST Adds I3C Secondary Controller Core to MIPI IP Product Line
- M31's Revenue Grew Against the Trend by 18.5% Last Year and Will Increase Investment in Advanced Processes This Year
Headlines for Thursday Mar. 07, 2024
sureCore announces ultra-low power memory IP for AI applications
SureCore has revisited its PowerMiser IP and further optimised it to drive down dynamic power further as well as exploiting the power efficiencies of FinFET technology. This has delivered a memory technology that minimises thermal impact whilst delivering the demanding performance profile needed by AI and has called it “PowerMiser AI”.- Marvell Announces Industry's First 2nm Platform for Accelerated Infrastructure Silicon
- SignatureIP announces PCIe Gen 6 Controller IP
Headlines for Wednesday Mar. 06, 2024
Industry Leading PPA DSP Available For All Existing EFLX eFPGA
Flex Logix® Technologies announced today that InferX DSP is in development for use with existing EFLX eFPGA from 40nm to 7nm.- Niobium and Veriest collaborate to develop the world's fastest complete FHE accelerator chip
- BrainChip Adds Edge Box to Chip and IP Offerings
- Taalas emerges from stealth with $50 million in funding and a groundbreaking silicon AI technology
- Imsys develops RISC-V core, looks to AI in space
- UMC Reports Sales for February 2024
- Flex Logix Joins Intel Foundry USMAG Alliance
- Ethernovia Unveils World's First Single and Quad Port, 10G to 1G Automotive PHY in 7nm
- GUC Monthly Sales Report - February 2024
- JEDEC Publishes GDDR7 Graphics Memory Standard
- Cadence to Acquire BETA CAE, Expanding into Structural Analysis
Headlines for Tuesday Mar. 05, 2024
Scalable Extreme-Speed IPsec Added to Xiphera's Security Protocols Portfolio
Xiphera releases extreme-speed IPsec (Internet Protocol security) IP (Intellectual Property) core. The new IP core completes the Security Protocols family providing protection for the layers 2, 3, and 4 of the OSI model. I- Nuclei System Technology collaborates with Siemens to deliver RISC-V Processor Trace Encoder solution
- Semidynamics puts the power of full core customisation into hands of customers
- BrainChip Boosts Space Heritage with Launch of Akida into Low Earth Orbit
Headlines for Monday Mar. 04, 2024
VeriSilicon's industry-leading embedded GPU IP powers HPMicro's high-performance HPM6800 series RISC-V MCU
VeriSilicon today announced that HPMicro’s HPM6800 series, a new generation digital dashboard display and human-machine interface system application platform has adopted VeriSilicon’s high-performance 2.5D Graphics Processor Unit (GPU) IP.- Agile Analog's Christelle Faucon: "Diversity and Equality Are Critical"
- Interview: Mahesh Tirupattur, executive VP of Analog Bits - "Be Passionate, Fail Fast and Recover Quick"
- Intel Launches Altera, Its New Standalone FPGA Company
- Rambus Initiates Accelerated Share Repurchase Program
- Unleash Next-Gen Speeds with Silicon-Proven USB 3.0 PHY IP Cores with Type-C Support in Multiple Process Nodes
- Scaleway launches its RISC-V servers in the cloud, a world first and a firm commitment to technological independence
- Agnisys to Showcase Expertise at DVCon US with Exclusive Short Workshop and Tutorial Sessions
- Accellera Approves Verilog-AMS 2023 Standard for Release