MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5)
USB4 PHY in Samsung (SF4X)
M31 eUSB2 PHY IP in TSMC(3nm, 5nm, 6nm, 7nm)
MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (N5, N3)
AiM Future Brings GenAI Applications to Mainstream Consumer Devices
Actions Technology's smart watch SoC adopted VeriSilicon's 2.5D GPU IP
Digital Core Design in cooperation with DCD-SEMI Unveils DCAN-XL: Revolutionary CAN XL IP Core Bridging the Gap Between CAN FD and Ethernet
An Introduction to Post-Quantum Cryptography Algorithms
Synopsys 3DIO Solution for Multi-Die Integration (2.5D/3D)
SoC NoCs: Homegrown or Commercial Off-the-Shelf?
Keynote: Charting the AI-Powered Transformation in the Semiconductor Industry
Semiconductor Manufacturers Must Adapt to Shifting Landscape
Addressing Challenges with FPGAs in Space Using the GR716B Microcontroller
© 2024 Design And Reuse
All Rights Reserved.
No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.
Suppliers, list your IPs for free.