High-performance mixed-precision NPU IP
Globalfoundries 12nm MIPI D-PHY V1.2@2.5GHz
Tessent RISC-V trace and debug
Secure-IC's Securyzr™ Tunable AES (ECB, CBC, CTR, XTS, CCM, GCM) accelerator - optional SCA protection
X-Silicon Announces a NEW Low-Power Open-Standard Vulkan-Enabled C-GPU™ - a RISC-V Vector CPU Infused with GPU ISA and AI/ML acceleration in a Single Processor Core
VESA Elevates PC and Laptop HDR Display Performance with Updated DisplayHDR Specification
Ceva, Inc. Announces First Quarter 2024 Financial Results
Synopsys 3DIO Solution for Multi-Die Integration (2.5D/3D)
SoC NoCs: Homegrown or Commercial Off-the-Shelf?
From a Lossless (~1.5:1) Compression Algorithm for Llama2 7B Weights to Variable Precision, Variable Range, Compressed Numeric Data Types for CNNs and LLMs
Interactive Debugging: Reduce Your Simulation Debug Turn-Around-Time
Streamline PCIe 6.0 Switch Design with Effective Verification Strategies
How Synopsys IP and TSMC's N12e Process are Driving AIoT
© 2024 Design And Reuse
All Rights Reserved.
No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.
Suppliers, list your IPs for free.