The drive to constrain product costs and power consumption places severe limits on system designers, particularly with external memory bandwidth. To increase performance, designers need to focus on efficient use of this system bandwidth. In turn, this drives the need for products to help with the analysis of the system dynamics and intelligent fabric architectures to manage the scarce resources. This article examines the role of Verification and Performance Exploration (VPE) and introduces the design objectives behind the advanced Quality-of-Service (QoS) mechanisms to optimize the performance that can be delivered by such systems.
Once a chip development project has started, project managers are asked almost immediately to provide early representations of the chip development for various purposes. This paper will review different use models driving requirements for intellectual property (IP) models in different project stages. Different prototyping techniques will be introduced and we will outline that none of them alone is able to meet all requirements users have for IP models.