PHY/PCS Logical Sub-Block IP Core for PCIe supporting PCIe 5.0, 4.0, 3.1 PHY/PMA and compliant to the PIPE 5.2 and 4.4.1 Specifications
IEEE 802.11i MAC
RF PHY IP for Bluetooth, Thread, Zigbee in TSMC (40nm, 22nm)
SD/eMMC in TSMC (28nm, 16nm, 12nm, N7, N6)
RaiderChip raises 1 Million Euros in seed capital to market its innovative generative AI accelerator: the GenAI v1.
CFX announces commercial availability of low cost automotive grade SonoS based charge trapping EFlash/MTP technology on 90nm BCD process
Qualitas Semiconductor expands presence in chinese market through strategic partnership with chinese chip design company
Functional Safety for Control and Status Registers
An Introduction to Post-Quantum Cryptography Algorithms
Synopsys 3DIO Solution for Multi-Die Integration (2.5D/3D)
Rambus CXL IP: A Journey from Spec to Compliance
Keynote: Charting the AI-Powered Transformation in the Semiconductor Industry
Semiconductor Manufacturers Must Adapt to Shifting Landscape
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