D&R Headline News (November 1999)

Headlines for Nov. 30, 1999

Latest News

• Xilinx Releases 16 new parameterizable cores on IP Center for Virtex Series

Headlines for Nov. 29, 1999

Latest News

• IP2000 to show off latest in silicon IP next March
• Altera Announces First PCI-X Core for PLDs From Newest AMPP -SM- Partner, DCM Technologies
• Startup QuArc unveils tiny MPEG-2 core
• Actel offers low-cost programmable PCI core
• Pivotal to supply analog to UMC for system-on-a-chip
• Micro Digital Announces DiskOnChip® Single Chip Flash Disk Supported in SMX®

Headlines for Nov. 27, 1999

Latest News

• 3G intellectual property licensing strategy comes under fire

Headlines for Nov. 23, 1999

Latest News

• SIA road map defines performance-SoC challenges
• 1999 roadmap targets new 'performance SoC' category

Headlines for Nov. 22, 1999

Latest News

• Cadence launches library vendor program to advance COTS design
• STMicroelectronics and Synopsys Announce Partnership To Develop Industry-Standard Tool Platform for Design Reuse

Headlines for Nov. 21, 1999

Latest News

• Aristo Signs Second Graphics Design Company Gigapixel Adopts IC Wizard for Block-based Design

Headlines for Nov. 17, 1999

Latest News

• LSI Logic delivers total CDMA baseband solution to Denso Corporation for wireless handsets
• Lucent Technologies, Wind River, Trillium Digital Systems leverage expertise to reduce time-to-market for Internet phones by as much as six months

Headlines for Nov. 15, 1999

Latest News

• Xilinx and Applied Telecom Announce Inverse Multiplexer ATM Solution for Virtex-E FPGAs
• Synthesis tool enables mixed-signal core design
• Cadence offers IP service, signs Oki as customer

Headlines for Nov. 11, 1999

Latest News

• Aldec forms Partnership with Alatek IP Design House
• SOC market opportunities favor fewer players, says research firm

Headlines for Nov. 08, 1999

Latest News

• Virtual Silicon lends its libraries for UMC process
• Synopsys and Hitachi Deliver First Hardware/Software Co-Verification Models for SH3-DSP and SH-4 Processor Cores
• IKOS Systems Introduces ARES RTL Acceleration System for Fast Functional Verification

Headlines for Nov. 03, 1999

Latest News

• Altera Announces Premier Echo Canceller Intellectual Property Core for VoIP Applications
• Stellar and Sican team up on cores
• Zilog debuts soft core comm processor
• ASIC vendors warned on rise of core providers
• Simutech, ISS evaluate a core via the Web
• DSP Group and VLSI Technology announce first silicon of the powerful PalmDSPCore Digital Signal Processor

Headlines for Nov. 02, 1999

Latest News

• Choppy seas ahead for IP business

Headlines for Nov. 01, 1999

Latest News

• Massana Unveils the FILU-DMT, a G.Lite DSP Coprocessor Core That Delivers Lower Silicon Cost than a Complete Chipset
• Synopsys and Mentor Graphics Release "OpenMORE" Reference Program for Evaluating IP Design Reuse and Verification
• Logic Corporation introduces open standard ZSP400 digital signal processor core
• BOPS names Rick Kepple as V.P., Sales & Marketing
• Lexra to Fight Patent Infringement Suit by MTI
• Zilog Cartezian Communications engine
• VLSI Solution, Mentor Graphics Ink DSP Agreement Enriching Inventra IP Library
• BOPS Inc. Introduces ManArray Compiler for matlab^R
• Synopsys and ARM Team to Deliver Industry's First Mixed-Language Solution for Secure, Portable IP Models
• LSI Logic Corporation Introduces Open Standard ZSP400 Digital Signal Processor Core

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