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Headline (January 2009) Sign Up for SoC News Alert  |
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| Headlines for Jan. 30, 2009 | |
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MIPS Technologies Reports Second Quarter Fiscal 2009 Financial Results Highlighting GAAP Profit and Positive Cash FlowRevenue for the second quarter was $26.4 million, essentially flat compared with both the prior quarter revenue of $26.2 million and to the $26.5 million reported in the second fiscal quarter a year ago. The Q2 sequential revenue increase was driven by increased revenues from royalties offset by slightly lower license revenue. |
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| Headlines for Jan. 29, 2009 | |
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| Headlines for Jan. 28, 2009 | |
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Sundance Upgrades Multi-Processor To Storage Interconnect with Single Chip SATA II SolutionSundance and LogicDesign Solutions today announced the delivery of LogicDesign’s Serial ATA Host and Dual Host Controller IP for the Xilinx Virtex 5 FPGAs featured in the Sundance 7-Series of multiprocessing modules. The LogicDesign core is compliant with the Serial ATA II specification and supports signalling rates of 1.5Gbps SATA-Gen1 and scales to 3Gbps SATA-Gen2. VHDL source code, test benches, validation data and DO-254 documentation can be provided. |
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| Headlines for Jan. 27, 2009 | |
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MathStar Has Prepared FPOA Technology Package for PurchaseMathStar, a fabless semiconductor company specializing in high-performance programmable logic, is finalizing its Field Programmable Object Array (FPOA) technology and intellectual property package for sale. |
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| Headlines for Jan. 26, 2009 | |
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Intelop announces TCP-Offload Engine SoC IP with integrated GEMAC, ARP module and AMBA 2.0 bus interface running at 2-Gbps capable of managing thousands of simultaneous TCP sessionsIntelop Corporation, a leading high end IP developer, customization & electronic engineering design services provider, today announced delivery of their second generation TCP offload engine SoC solution integrated with ARP hardware module, G Bit Ethernet MAC and AMBA 2.0 bus interface running at 2 Gbps sustained rates. |
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| Headlines for Jan. 23, 2009 | |
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Arasan Chip Systems Aligns with SDA on SDXC In a continuing effort to develop Arasan’s mobile eco-system, Arasan will be the first IP provider to adopt the SDXC specification from SDA, supporting higher density and faster SD cards. Arasan is in development on the new specification and will be ready to provide a fully compliant solution to the market upon ratification. |
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| Headlines for Jan. 22, 2009 | |
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Virage Logic Announces RestructureVirage Logic today announced a restructure as part of its on-going transformation to become a broad line supplier of highly differentiated standard IP products. As a result of the restructure and the anticipated increase in efficiencies, the company expects to realize approximately a 13% reduction in labor expenses. |
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| Headlines for Jan. 21, 2009 | |
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Coreworks Announces Certified BDTI DSP Kernel Benchmarks Results for its SideWorks ArchitectureCoreworks today announced certified BDTI DSP Kernel Benchmarks™ results for its Mid-Grain Array Reconfigurable Architecture based upon the SideWorks technology. These results have been obtained for a DSP block, dubbed CWcomp4465, built with a SideWorks data engine tightly coupled with FireWorks™, a simple 32-bit RISC processor, also property of Coreworks. |
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| Headlines for Jan. 20, 2009 | |
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Synopsys Enhances DesignWare Ethernet IP With Support for IEEE 1588 Specification and ARM AMBA 3 AXI InterfaceSynopsys today announced it has enhanced the DesignWare® Ethernet MAC 10/100/1G IP to include support for the latest IEEE 1588 specification as well as an interface to the ARM® AMBA® 3 AXI™ protocol. |
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| Headlines for Jan. 19, 2009 | |
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Intelop delivers their second generation TCP-Offload Engine SoC IP with integrated G-bit Ethernet MAC and AMBA host bus interface SOC-FPGA to a strategic European OEM customer in Network Security systems and Telecom marketsIntelop today announced delivery of their second generation TCP offload engine SoC solution with integrated with ARP hardware module, G Bit Ethernet MAC and AMBA host bus interface running at 2 Gbps sustained rates . It implements control plane and data plane processing of TCP/IP in hardware that is at least 20 times faster than TCP/IP software stack. |
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| Headlines for Jan. 16, 2009 | |
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Noesis Technologies releases AWGN channel emulator IPNoesis Technologies announced the immediate availability of its standard AWGN Noise Generator IP core (ntAWGN). The core is fully programmable, able to support throughput rates up to 8Gbps, rendering it an ideal solution for channel emulation of high data rate applications. |
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| Headlines for Jan. 15, 2009 | |
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CEVA Introduces Industry's Most Compact and Power-Efficient Single-Core DSP Solution for HD Audio ApplicationsBased on the high-performance 32-bit CEVA-TeakLite-III™ DSP core running at speeds of up to 550MHz, the highly-optimized CEVA-HD-Audio platform is the most compact and power-efficient solution available for HD audio integration into home entertainment and consumer ICs. The CEVA-TeakLite-III DSP core has been adopted by several consumer IC vendors for HD audio applications to date, and is currently being designed into a next generation Blu-ray DVD chip by one of the world's leading DVD IC vendors. |
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| Headlines for Jan. 14, 2009 | |
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Sequans Communications Achieves First-Pass Silicon Success with Synopsys DesignWare USB 2.0 nanoPHY IPSequans' advanced Mobile WiMAX baseband chip, the SQN1130, implements a unique, low-complexity MIMO algorithm, mimoMAX™, that delivers high data throughput with very low power consumption. Sequans needed a USB 2.0 PHY core that would meet their low power and small area requirements. After evaluating several IP providers, Sequans selected Synopsys DesignWare USB nanoPHY IP because it was 30 percent lower in area and up to 15 percent lower in power compared to other IP offerings. |
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| Headlines for Jan. 13, 2009 | |
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Zoran Corporation Takes ARC IP Solution LicenseARC International announced that Zoran has taken a license to use ARC's configurable consumer IP solution. The first Zoran consumer system on chip (SoC) platform to use ARC's unique IP solution is from Zoran's Mobile Division. |
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| Headlines for Jan. 12, 2009 | |
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Court Declares Rambus Patents in Suit Unenforceable in Micron Delaware CaseRambus today announced that the U.S. District Court of Delaware in the patent infringement matter with Micron Technology has found that Rambus cannot pursue its claims against Micron due to spoliation. |
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| Headlines for Jan. 09, 2009 | |
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Cadence Appoints Lip-Bu Tan President and Chief Executive OfficerCadence Design Systems today announced that its Board of Directors has unanimously appointed Lip-Bu Tan as president and chief executive officer, effective immediately. Tan, who had been serving as interim vice chairman of the Board of Directors of Cadence® and member of the Interim Office of the Chief Executive, will remain a member of the Board. |
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| Headlines for Jan. 08, 2009 | |
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Wipro-NewLogics High Speed Interface Technology to Be Included in Microsoft Corporations Microsoft Auto PlatformThe 1394 Software IPs will be included in the Microsoft Auto platform and can be used by Automotive OEMs and Suppliers for in-car information and entertainment applications. The high throughput and Quality of Service provided by IEEE 1394 technology will make in-car entertainment richer by supporting front and rear seat audio and video distribution for the passengers |
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| Headlines for Jan. 07, 2009 | |
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ARC Launches "Sound-to-Silicon" Audio IP Solutions For Portable, DTV, Home Theater, and PC/Laptop Consumer ProductsARC International (LSE: ARK) today introduced new vertically integrated audio intellectual property (IP) solutions for three major consumer electronics product categories: digital TVs and home theaters, portable media devices, and PC and laptop computers. These “sound-to-silicon” solutions comprise ARC’s industry leading audio enrichment software, low power hardware platform, optimized codecs and related software, and development and mastering tools and services. |
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| Headlines for Jan. 06, 2009 | |
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Sigma Designs Employs Sidense Memory in IPTV ProductSidense today announced that Sigma Designs has selected Sidense’s one-time programmable (OTP) memory IP for their future chipset products. Sidense’s flexible SiPROM architecture allows Sigma to securely embed HDCP keys as well as boot code in their next-generation internet protocol television (IPTV) SoCs. |
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| Headlines for Jan. 05, 2009 | |
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Report: Startups caught in cash squeezeEstablished companies are tightening their purse strings when it comes to acquiring venture-based startups and the door to public offerings is essentially closed as startup deals hit significant lows in 2008, according to VentureSource. |
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| Headlines for Jan. 02, 2009 | |
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