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eInfochips today announced the availability of Verification Methodology Manual (VMM)-enabled MIPI® CSI-2 (Camera Serial Interface), DSI (Display Serial Interface), HSI (High Speed Synchronous Interface) & SDIO Verification IP (VIP)
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Samsung Electronics Ltd has started sampling its ARM11-based application processor that will be made on its 45-nm CMOS process technology.
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Tiempo today announced it has closed a 5 million Euros Series B financing round with two new investors, Viveris Management and Oddo Private Equity. Previous Series A investors, i.e. EmerTec Gestion, Schneider Electric Ventures, INPG Entreprise SA and Alma Capital Finances, also participated to this round.
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Xilinx today released the Xilinx Base Targeted Design Platform aimed at accelerating the development of system-on-chip (SoC) solutions with Xilinx(R) Virtex(R)-6 and Spartan(R)-6 field programmable gate arrays (FPGAs).
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Top venture capitalists say opportunities are changing and narrowing for semiconductor startups because the costs of bringing a new processor or system-on-chip to market are becoming prohibitive and raising new funds to invest in high tech companies of any kind is getting increasingly difficult.
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Tensilica today announced the first member of its new ConnX family of digital signal processor (DSP) cores for system-on-chip (SOC) design. The ConnX Baseband Engine enables efficient baseband processing for 3G, LTE (Long-Term Evolution) and 4G wireless equipment with its scalable, high-performance DSP architecture that provides industry leading computational throughput of 16 18-bit MACs per cycle.
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VinChip Systems announces the immediate availability of its convergent 32-bit RISC processor, VinRZ5110. Its DSP enhanced instruction set architecture, low power design and optimized gate count makes it well suited for DSP and other embedded applications.
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Arasan announced that Movidia, a fabless semiconductor company based in Dublin, Ireland, specializing in video editing technology for mobile phones, has licensed Arasan's Secure Digital SD/SDIO/MMC Host IP and SD/SDIO Combo Device IP for its next generation SoC.
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Innovative Logic announced today the second release of USB 3.0 Device Controller IP. Inno-Logic’s USB3.0 IP offering includes implementation IP as well as verification IP by making use of industry standard latest tools and methodologies.
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CoWare announced the availability of a new Interconnect and Memory Subsystem Performance Optimization design flow for CoWare Platform Architect, enabling early and efficient optimization of next-generation system-on-chip (SoC) architectures using ARM® AMBA®-based virtual platforms.
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Upon completion, Cadence expects to achieve annual operating expense savings of approximately $30 million, through a combination of workforce and other expense reductions.
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TSMC today announced its net sales for May 2009: on an unconsolidated basis, sales were approximately NT$24.47 billion, an increase of 12.6 percent over April 2009 and a decrease of 15.6 percent from May 2008.
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Silicon Clocks, a leader in integrated timing solutions for electronic systems, today announced the completion of a $10.3M Series C financing to enable the company to ramp into full production the J-Series family of low jitter timing products, as well as transition its cutting edge CMEMSTM (Standard CMOS + MEMS) process technology into commercial products.
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Gennum today announced that its Snowbush IP group has developed the industry’s first available integrated PCI Express® 3.0 (Gen 3) PHY and Controller IP solution. The new PCIe® 3.0 cores can be licensed immediately by system-on-a-chip (SoC) and system companies, enabling early deployment of PCIe 3.0 (Gen 3) in systems requiring the 8.0 Gigatransfers per second (GT/s) performance of this new PCI-SIG standard. PCIe 3.0 opens up more bandwidth using the same physical connectors and adds new features to improve the user experience in server network and computer products using PCI Express.
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There will undoubtedly be fallout from Intel Corp.'s move into the embedded software market, a market well beyond its traditional PC and server segments.
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Intel Corporation has entered into a definitive agreement to acquire Wind River Systems Inc, under which Intel will acquire all outstanding Wind River common stock for $11.50 per share in cash, or approximately $884 million in the aggregate.
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Synopsys today announced that its DesignWare® DDR3/2 PHY and digital controller IP is the first DDR3 IP that has been fully verified in test silicon at 1600 Megabits per second (Mbps), the maximum data-rate of the JEDEC DDR3 specification.
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Palmchip today announced the launch of their “SoCStart” IP Program providing free semiconductor IP cores. The company is also announcing the AcurX-51™, a SoC platform with integrated 8051 core. Designers can use this SoC platform to quickly start their SoC chip project. AcurX-51 is ported into Xilinx FPGA for rapid firmware and software development.
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Altera today announced availability of the industry's highest density, highest system-bandwidth FPGA to address the stringent demands of today's bandwidth-heavy applications. Featuring 11.3-Gbps transceivers and 530K logic elements (LEs), the Stratix® IV GT EP4S40G5 and EP4S100G5 FPGAs are the latest variants of Altera's 40-nm Stratix IV FPGA family shipping to customers.
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