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Synopsys today announced availability of a new DesignWare® MIPI M-PHY IP solution supporting multiple speed gears and a broad range of high-speed interfaces for mobile applications.
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Synopsys today unveiled its Discovery™ Verification IP (VIP) family based on the new VIPER architecture. Written entirely in SystemVerilog with native support for the UVM, VMM and OVM methodologies, Discovery VIP provides inherent performance, ease-of-use and extensibility to speed and simplify verification of the most complex system-on-chip (SoC) designs.
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VeriSilicon announces immediate availability of Hantro G1v5 Multi-format Decoder and Hantro H1v5 Multi-format Encoder semiconductor IPs which support 4K x 4K video, achieved through core enhancements and improved memory latency resiliency up to 600 cycles.
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Altera today announced it has successfully demonstrated interoperability with a 100-Gbps optical module using its 28-nm Stratix V GT FPGAs.
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CEVA-XC4000 offers unparalleled, scalable performance capabilities and innovative power management to address the most demanding communication standards, including LTE-Advanced, 802.11ac and DVB-T2, on a single architecture
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PLDA today announced QuickPCIe - the industry's most advanced PCI Express interface IP solution featuring a high performance configurable DMA. QuickPCIe is a revolutionary breakthrough in IP integration, standardizing on the AMBA(R) AXI open interconnect protocol to provide a unified and scalable interface to user logic.
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MoSys has successfully demonstrated interoperability of its Bandwidth Engine® IC with the SerDes characterization and evaluation board from LSI Corporation.
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Synopsys today announced the immediate availability of DesignWare® HDMI (High-Definition Multimedia Interface) 1.4 PHY IP in advanced 28-nanometer (nm) processes for multiple leading foundries.
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VeriSilicon announced a licensing agreement for ZSP G3 cores with Marvell . The agreement includes the Dual-MAC ZSP800M and ZSP880M synthesizable DSP cores which are area and power optimized for efficient mobile application and digital entertainment platform solutions.
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Evatronix SA introduced today the complete series of Mobile Industry Processor Interface (MIPI) Alliance SLIMbus IP cores that implement next-gen serial interface for low power multimedia applications, especially mobile. The design is already proven to seamlessly operate as a key component within the SLIMbus to I2S bridge from LnK.
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Elliptic Technologies has introduced the tVault™ Security Architecture - a flagship technology that enables end-to-end security in connected devices. tVault provides robust security inside Trusted Execution Environments (TEEs) and enforces the protection of sensitive information to ensure that it is stored, processed and accessed only by authorized applications.
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ARM CEO Warren East (shown) says the U.K. processor IP vendor would consider acquiring non-volatile memory IP as a way to bolster its physical IP division.
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eoSemi, the all-silicon oscillator company, has confirmed that it has secured a $2.3million (£1.5milion) second tranche of funding. All of the company’s existing investors, including NESTA Investments, Capital-E, and EV, participated in the latest round of financing.
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Sonics today announced that its advanced on-chip networks will support Tensilica’s processor interface (PIF) to maximize customers’ IP integration and SoC efficiencies.
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Sonics continues to move forward with its patent infringement lawsuit filed against Arteris on November 1, 2011. Sonics has been careful, diligent and deliberate as we developed our technology and products, and we intend to remain factual and accurate in our communications with partners and customers.
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