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Headline (July 2006)      Sign Up for SoC News Alert
   Headlines for Jul. 31, 2006
  • Ikanos Expanding Triple Play Expertise with Acquisition of Doradus Technologies
  • Actel Broadens Support for CoreMP7-Based Designs With New SoftConsole Tool
  • Faraday Collaborates with Novas to Accelerate Debugging of Designs Containing Memory IPs
  • Wind River Contributes Over 300,000 Lines of Code to the Eclipse Foundation
  •    Headlines for Jul. 30, 2006
  • SanDisk to Acquire msystems; msystems to become wholly owned subsidiary of SanDisk
  •    Headlines for Jul. 28, 2006
  • Virage Logic Reports Third-Quarter Fiscal 2006 Results; License Revenues Increase 7% Sequentially and 20% Year-Over-Year
  • QUALCOMM and SMIC Form Strategic Agreement for Turnkey Semiconductor Fabrication and Test Services
  • Rambus Accepts Court's Damages Award in Hynix Infringement Trial
  • Rambus Announces Management Changes
  • SMIC Reports 2006 Second Quarter Results
  • TTPCom's software is first portable 3G protocol stack to achieve full GCF and IOT accreditation
  • Verification: Automation no substitute for thought, Foster says
  •    Headlines for Jul. 27, 2006
  • Analog Devices, NEC, StarCore LLC, Tensilica, and Texas Instruments join Nexus 5001 Forum
  • GDA Technologies Announces Availability of Advanced Mezzanine Reference Platform for Freescale's High-Performance MPC8548E PowerQUICC(TM) III Processor
  • Airbee and ZMD Team to Deliver 900 MHz ZigBee Technology
  • TSMC Reports Second Quarter EPS of NT$1.32
  • MIPS Technologies Reports Fourth Quarter and Fiscal 2006 Financial Results; Highest Revenue in More than Five Years
  • MOSAID Brings Motion to Dismiss Micron Complaint
  • Details of ST's Nomadik processor disclosed
  •    Headlines for Jul. 26, 2006
  • Denali to Work With The SPIRIT Consortium on Effort to Address Control Registers
  • LogicVision and GDA Technologies Partner to Deliver LogicVision's Unique High Speed I/O Test IP
  • Iran develops 32-bit processor
  • Synopsys Donates Library of Advanced SystemVerilog Assertion Checkers to Accellera Standards Organization
  • CoWare Announces Open Release of SystemC Modeling Library (SCML) Source Code
  • Evatronix Adds IP-XACT Assured XML Meta-data to USB Cores Range
  • Hantro Enables Multimedia Applications on Freescale's i.MX31 applications processor, i.300 and MXC cellular platforms
  • MOSAID Sues Micron, Powerchip and ProMOS in Texas for Patent Infringement
  • Luminary Micro Announces Availability of Thirteen New Stellaris(TM) 32-bit Microcontrollers Based on ARM(R) Cortex(TM)-M3 Core
  • ESL panelists call for TLM standards
  • Comneon Announces General Availability of its APOXI Application Framework Software for Mobile Phones
  • Saifun Semiconductors Reports Second Quarter 2006 Results
  • Should IP adopt a services business model?
  •    Headlines for Jul. 25, 2006
  • Avery Design and ASIC Architect Team to Deliver Serial ATA (SATA) IP Solution
  • IP encryption brings trust, panelists say
  • Express Logic Announces ThreadX(R) RTOS Support for Luminary Micro's Stellaris(TM) Microcontrollers
  • MOSAID Announces Micron Complaint
  • ARM Holdings PLC Reports Second Quarter And Half Year 2006 Results
  • Sarnoff Corporation Licenses ARM11 MPCore Multi-Core Processor
  • AVID Electronics Corporation Adopts ARC Video Subsystem
  • Teknovus Licenses MoSys 1T-SRAM(R) for Their Gigabit Ethernet Passive Optical Network (GEPON) Chip Sets
  • Templeton quits ARM board to lead startup
  • Poseidon Announces the Second Generation of Hardware Accelerator Synthesis for Processor-Based Designs
  •    Headlines for Jul. 24, 2006
  • Certicom Launches New Product for Fabless Semiconductor Designers to Prevent Gray Market Chip Theft
  • eMemory Technology Inc. announces the launch of Neobit one-time programmable (OTP) IP on 0.15-micron high voltage process
  • Sonics and CoWare Introduce Advanced Exploration Solution for Multiprocessor SoC Architectures
  • Lattice FPGA IP Support Expands With Multimedia Cores From Art of Silicon
  • MIPS Technologies Licenses Processor Cores to Toshiba for Next-Generation Digital Consumer SoC Solutions
  • Virage Logic and MIPS Technologies Introduce New Core-Optimized IP Kits for MIPS32(R) 24K(R), 24KE(TM) and 34K(TM) Core Families in 90nm G Process
  • Virage Logic Library Powers SOCLE's Structured ASIC Platforms
  • ARM Announces AMBA 3 AXI Design Tools And Fabric IP For High-Performance, Power-Efficient SoC Designs
  • ARM Enhances Reference Methodologies With Library Views And Pre-Compiled Rams
  • Evatronix Releases Updates to R8051XC Microcontroller Cores
  • Altera Ships Industry's Highest Density FPGA With Embedded Transceivers
  • Strategic Partnership Between Si2 and The SPIRIT Consortium to Facilitate Productivity Improvement for SoC Design Flow
  • ASIC design starts slowing, but market growth continues
  • ARM and ArchPro Verify 65-Nanometer Multi-Voltage SOC Before Silicon
  • Virage Logic's ASAP Memory Solidifies Place in the SoC Ecosystem with Incorporation into CEVA DSP Platform
  • Cadence And ARM Introduce First Automated Design And Implimentation Flow For The ARM Cortex-A8 Processor
  • ARM Announces RealView System Generator: Fast Virtual Prototypes For Real-Time System Interaction
  • Poseidon Announces 'Standards Based' Support for Triton Tuner Simulation Platform
  •    Headlines for Jul. 21, 2006
  • Deal enables MOSIS to offer XAP 16-bit processors
  • Parallel processor firm enhances core for HD video
  • Magma's Blast Create SA Used by STMicroelectronics to Deliver Industry's First Application-Specific Structured ASIC
  • CPU Tech and IBM Collaborate on New Class of Semiconductor Devices; Acalis(TM) Programmable Semiconductor Devices add Flexibility, Capacity and Software Compatibility to Multi-Core Processing Solutions
  • HDMI Annual Fee Reduced; HDMI Growth Enables Fee Reduction, Making HDMI Even More Affordable for All
  • Silistix and CoWare Developing ESL-Based Design Flow for Chips Using Asynchronous Self-Timed Interconnect
  • India boosts IP rights enforcement
  • Concerns grow over 'patent trolls'
  •    Headlines for Jul. 20, 2006
  • Magma Announces Availability of Reference Methodology for ARM Cortex-R4 Processor
  • CEVA and ASTRI Form Partnership to Develop New-Generation Multimedia Solutions for Hong Kong and Greater China
  • Dongbu Electronics Expands Analog IP Portfolio to Support Development of Advanced Chips for Mobile Applications with ChipIdea
  • CEVA Inc. Reports Second Quarter 2006 Financial Results
  • PLD Applications and Rapid Bridge Systems Announce Partnership; Innovative ASIC platform for Nanometer Technologies Reduces Risk and Shortens Time to Market for PCI Express designs
  • Rambus Achieves Record Revenue for the Second Quarter
  •    Headlines for Jul. 19, 2006
  • PLDA and ChipX Announce Collaboration -- PCI Express IP Integrated in Structured ASIC to Offer Complete PCIe Solution
  • Silicon & Software Systems (S3) Announces 90nm CMOS IP Licensing Agreement for Mobile TV Applications
  • Sonics and Summit Design Team to Accelerate Industrywide SystemC Platform SoC Transformation
  • Infineon to Enter Ultra-Wideband Market with Industry's First Dual-Band RF-CMOS Transceiver Core - Paving the Way for the Converged Entertainment Cell Phone
  • ARM Releases Next-Generation DDR Memory Solutions To Improve Chip Performance
  • Celoxica Adds Floating-Point Toolkit to IP Portfolio; Cores Optimized for FPGA-Based Digital Signal Processing & High-Performance Computing Applications
  • TTPCom announces availability of 3G DigRF interface module
  • Azuro's PowerCentric Reduces Power Consumption For ARC Configurable Subsystems and Cores by More Than 20 Percent
  • Rambus Expects Financial Restatement Related to Stock-Based Compensation
  • FSA Introduces Mixed-Signal/RF PDK Checklist Version 2.0
  • Tri-Vision licenses U.S. V-chip to Lite-On
  •    Headlines for Jul. 18, 2006
  • Toshiba Appoints Three New Vice Presidents in the System LSI Group
  • Market Rapidly Embraces Tensilica's Diamond Standard Processor Cores in 2Q06
  • Chipidea, Chartered Collaborate to Offer Advanced Mixed-Signal IP at 65nm
  • TSMC and ARM Collaboration Achieves Significant Power Reduction On 65nm Low-Power Test Chip
  • Anyka Selects ARM Architecture For Advanced Multimedia Processor Development
  • The SPIRIT Consortium Welcomes STARC as the First Japanese Institute to Support Design Meta-Data Standardization
  • Altera Announces First AQEC-Compliant FPGAs
  •    Headlines for Jul. 17, 2006
  • Arteris and CoWare Announce Integration of Arteris Network on Chip (NoC) Technology Into CoWare Platform Architect ESL Design Environment
  • IP Cores, Inc. Announces Two CCM* Security IP Cores for IEEE 802.15.4 Designs
  • BiTMICRO(R) Networks Signs Corporate Agreement for Kilopass 90-Nanometer XPM Memory Technology; XPM Picked for Secure Software Storage for Next-Generation Storage Solutions
  • Elixent acquired by Matsushita, says report
  • Silistix Self-Timed Interconnect Solution Adds Support for AXI Bus Protocol
  • CEVA and CoWare Announce Availability of Processor Support Packages for CEVA Cores Within CoWare ESL Design Environment
  • QualCore Logic Adds Line of Temperature Measurement IP to Portfolio; Analog Cores Used to Measure Internal Temperature of ICs
  • Virage Logic's Silicon Aware Star Memory System Exceeds 100,000,000 Units
  • Rambus Appoints Penny Herscher to its Board of Directors
  • Xilinx Releases ISE WebPACK 8.2i - FPGA Industry's Only Free Fully Featured Design Suite
  • Startup takes dual IP, ESL role
  • Venture capital investment gives Accent independence and boosts global expansion plans
  • TSMC Continues Industry Leadership with Reference Flow 7.0
  • Infineon Multimedia Platform Selected by LGE for New EDGE Mobile Phones
  •    Headlines for Jul. 13, 2006
  • DFM Parametric Yield Models for Memory IPs
  • PLDA and HARDI Electronics Forge Strategic Partnership
  • ARC International plc Announces Trading Update For the Six Months Ended June 30, 2006
  • ATEME launches EASEE: Audio/Video Software System for TI's DaVinci Technology
  • ATEME launches EASEE: Audio/Video Software System for TI's DaVinci Technology
  • Altera Customers Gain Performance, Power and Signal Integrity Advantages From Stratix II GX FPGAs
  •    Headlines for Jul. 12, 2006
  • Faraday and ITRI Jointly Launch the Highly Competitive VoIP Middleware
  • Azul Systems Deploys Denali Memory Solutions in Second-Generation Compute Appliances
  • Synopsys 2006.06 Release of DesignWare Library Reduces Area and Delay in IC Designs
  • IPextreme to Conduct IP Demos, Talks at DAC
  • Philips Handshake Solutions releases 5th generation clockless IC design environment with improved layout and testing
  • Cypress's SVTC Enables Cavendish Kinetics to Develop and Characterize Embedded Non-Volatile Memory Technology for Standard CMOS Processes
  • Genesys Testware Adds Top-Down Insertion of Test and Repair Circuits for Embedded Memory
  • Taiwanese Firm Taps Celoxica ESL Design to Accelerate HDTV Development
  •    Headlines for Jul. 11, 2006
  • IBM and Chartered Team with Synopsys for Mixed-Signal Connectivity IP at 65 NM
  • iPackets Selects the ARM7 System-on-Chip for Its Next-Generation iPMine-M8 810C Tracking Device
  • Outsourced R&D highlights need for IP rules
  • OCP-IP Releases PSL Package
  • IP Cores, Inc. Announces a Family of High-Speed AES/LRW IP Cores Supporting IEEE P1619 Standard
  • Morgan Kaufmann Publishes Tensilica Book Targeting SOC Designers
  • MoSys Updates Second Quarter 2006 Guidance
  •    Headlines for Jul. 10, 2006
  • Cswitch to Preview Configurable Switch Array(TM) Chip Technology at DAC 2006
  • MathStar, Inc. Announces World's Fastest Reprogrammable JPEG 2000 Encoder for the Field Programmable Object Array(TM) (FPOA(TM))
  • Altera Expands Into Portable Market With Lower Cost, Lower Power MAX II CPLDs
  • Aldec and Synplicity Partner on Encrypted IP Flow
  • Cswitch and Denali Team on PCI Express for Configurable Switch Array Chip
  • New eSilicon Direct Model Lowers Risks and Costs for Custom Chip Developers
  • Imagination Technologies strengthens its marketing and sales operations
  • TSMC June 2006 Sales Report
  • Actel's Enhanced Libero IDE Offers 'Smart' Functionality for Fusion Mixed-Signal FPGAs
  • Tenison Delivers System Level Use Of IP With VTRAC Technology
  • TietoEnator joins TTPCom's AJAR Platform ecosystem
  • Renesas Technology Releases SH-MobileL3V Application Processor for Digital TV Broadcast Capable Mobile Phones
  • Sarnoff Awarded $12 Million Contract Renewal for Design and Production of Replacement Integrated Circuits; Sarnoff Team Builds Upon Two Decades of Delivering Quality Reliable Components to Support the Warfighter
  •    Headlines for Jul. 07, 2006
  • Summit Design Launches Intellectual Property Initiative to Enable Consistent, Pre-Verified, Multi-Vendor Compatible IP
  • Faraday Monthly Sales Report - June 2006
  • Renesas Technology Releases SBC Middleware for SH3-DSP CPU Core Compliant with Bluetooth® Technology A2DP Audio Profile
  •    Headlines for Jul. 06, 2006
  • Rambus and Matsushita Sign Patent License Agreement
  • IQ-Analog now offers low power, size efficient wideband Analog Front End for (AFE) for WiMAX, Digital Video Broadcast and 802.11x applications
  • PnpNetwork Licenses Diamond Standard 330HiFi and 212GP for Mobile Phone TV Chip Designs
  • Concept Engineering Introduces RTLvision PRO to Help Designers of IP-based System-on-Chip Reach Faster RTL Code Closure
  • TaraCom Introduces SerDes/PHY IPs in 90 and 65-Nanometer
  • VeriSilicon Announces Acquisition of ZSP Digital Signal Processor Unit from LSI
  • VeriSilicon Receives US$ 14.8M in Series-C Financing Round From US Based Leading Venture Capital Firms
  • InSilica Announces Closure of US$18m in New Financing from Intel Capital, Flextronics, Crossbow Ventures, Dow Ventures, and NewPath Ventures
  •    Headlines for Jul. 05, 2006
  • Altera Adds New Member to Cyclone II FPGA Family
  • Toshiba and Rambus Sign Patent License Agreement
  • Software Radio Transceiver Module Boosts FPGA, Memory and ADC Resources for Complex Wideband Multi-Channel Systems
  • UMC Collaborates with NTU to Deliver RF Chip for WiMax
  •    Headlines for Jul. 03, 2006
  • DAFCA Announces Availability of ClearBlue Debug Infrastructure IP and Software Product Family
  • Mobilic Introduces New Portable Multimedia Development Kit
  • TTPCom extends partnership with Silicon Laboratories
  • Digital Core Design announces the release of a new DoCD kit v2.0 evaluation board
  • May Semiconductor Sales up 9.4 Percent Over 2005; Cell Phones and Consumer Electronics Fuel Growth
  • Real Intent Introduces Conquest(TM) and Ascent(TM), Leading the New EnVision(TM) High-Performance Formal Verification Family

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