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While keeping his cards close to the vest, MIPS CEO John Bourgoin hinted in an interview with EE Times this week that a DSP core company may be next.
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In two of the domains the company occupies on the sector of Silicon Intellectual Property, namely that of Memory and Cell Libraries and that of High Resolution Peripheral Components, its competitors continue their series of Mergers through Acquisitions by providers of microprocessors for Systems-on-Chip.
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The solution product has passed PCI Express Compliance and Interoperability testing in PCI-SIG compliance workshop. This solution enables SoC designers to plug-in PCI Express Controller Core into AMBA 2 AHB system bus. This directly leads to low design implementation risk.
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NEC Electronics' 90-nanometer (nm), 700 MHz (931 MHz under nominal process conditions) dual-core implementation of the ARM11(TM) MPCore(TM) multicore processor is the highest-performing ARM processor core on the market, while the NEC Electronics-implemented ARM926EJ-S(TM) processor core is the industry's fastest at 130 nm, clocking in at 400 MHz (532 MHz under nominal process conditions).
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MIPS Technologies will pay an aggregate of $147 million in cash, with an additional performance-based milestone payment of 610,687 shares of MIPS Technologies' common stock in 2009. At today's closing, MIPS Technologies will make an initial payment of approximately $120 million from its current cash reserves with the balance released from escrow within two years subject to an indemnification holdback and deferred payments for the Chipidea co-founders remaining with the company.
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NSCore, Inc., a supplier of nonvolatile memory (NVM) intellectual property (IP), today announced an agreement under which NSCore's PermSRAM technology is licensed to ROHM, a Japanese leading semiconductor manufacturer for use throughout its logic products.
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Sonics announced today that Sonics SMART Interconnect solutions are now available as library elements for Mentor Graphics' Vista(TM) and Visual Elite(TM) products. Mentor Graphics now offers a complete configuration, analysis and verification of SystemC SoC platforms based on Sonics SMART Interconnect solutions.
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SNOWBUSH's 6-bit ADC is compact, low-power, and by utilizing its high bandwidth sample-and-hold front-end, it maintains excellent dynamic performance throughout the full range of input frequencies. The ADC features INL of 0.59 LSB, DNL of 0.51 LSB, and ENOB of 5.2 or greater for sampling clock frequencies up to 2.5 GHz. The ADC occupies a silicon area of 0.43 square millimeters.
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QuickLogic today announced it has added a suite of digital rights management (DRM) security functions, including AES encryption, to the library of IP available for its programmable connectivity platforms. The technology greatly enhances time to market and time in market for handheld elec tronics products. It allows developers to extend the capability of their chosen embedded systems processor with both the security and peripheral interfaces they need, via a single low power consumption IC.
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The Open Verification Methodology (OVM) will deliver a tool-independent solution for designers and verification engineers that promotes data portability and interoperability. It delivers on the promise of SystemVerilog with established interoperability mechanisms for Verification IP (VIP), transaction-level and RTL models, and full integration with other languages commonly used in production flows. The OVM will include a robust class library and be available in source code format.
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Taiwan Semiconductor Manufacturing Company, Ltd. today announced that Microsoft has started production of the Microsoft Xbox 360 graphics-memory subsystem using the TSMC 90nm embedded DRAM process. Designed to meet the needs of volume consumer electronics devices, the TSMC 90nm eDRAM process features a high-density macro design (80Mb) and fast performance to 500MHz.
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The first hard core which reaches the worst case clock speed at 533MHz is available in UMC 0.13um process. Faraday expects its next versions for 90nm in UMC, running 667MHz and 800MHz in worst case, to be available in initial Q4 and the end of 2007 respectively.
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ARC International today set a new standard for high-quality video encoding with the introduction of five new members of the ARC® Video Subsystem family: AV 417V, AV 407V, AV406V, AV 404V, and AV 402V. All include ARC's new patent-pending technology "dynamic adaptive encoding" that enables encoding of video streams at the lowest power.
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PCI-SIG®, the Special Interest Group responsible for the PCI Express® industry-standard I/O interconnect technology, today announced the approval of 8GT/s as the bit rate for the next generation of PCIe® architecture, PCIe 3.0. In keeping with the industry expectations for ever-higher performance, low cost and compatibility, this represents the second speed increase since the initial launch of this I/O interconnect standard in 2003.
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Denali Software today announced that it has become the exclusive commercial provider of simulation models for memory devices made by Samsung Electronics. In naming Denali as exclusive provider of its simulation models, Samsung is ensuring faster access to high-quality simulated designs for its memory customers, while enabling designers to speed development of systems that utilize Samsung DRAM and NAND Flash memory, among other current and future memory devices.
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The planned acquisition will expand Virage Logic's ability to serve the company's chosen market by adding new products and services required in the rapid development of System-on-Chip (SoC) integrated circuits to Virage Logic's current family of memory compilers, logic libraries and related development tools
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ChipX announced today it has licensed processor IP cores from ARM. The licensed ARM® processors include the ARM926EJ(TM) featuring an enhanced 32-bit RISC CPU, Data and Instruction CACHE, a memory management unit (MMU) and DSP instructions.
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Except in a few cases, the semiconductor intellectual-property (IP) sector is a non-profit business. It's simply a lost cause, with a questionable business model. Most IP vendors are losing money in the arena. This week, in fact, several IP vendors posted losses for the quarter, including Aware, MoSys and Virage.
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Altera today expanded its intellectual property (IP) portfolio with the introduction of a complete USB 2.0 Hi-/Full-Speed Device Controller solution from System Level Solutions (SLS). This new solution is comprised of a soft IP core, software and class drivers, and SLS’s Snap-On PHY daughtercards. The daughtercards are designed for use exclusively with Altera® development kits.